Siddhartha Joshi

Orcid: 0000-0001-7640-4050

According to our database1, Siddhartha Joshi authored at least 6 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2020
A Low-Power, High-Speed Readout for Pixel Detectors Based on an Arbitration Tree.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Dynamically Reconfigurable Data Readout of Pixel Detectors for Automatic Synchronization with Data Acquisition Systems.
Sensors, 2020

MLParest: Machine Learning based Parasitic Estimation for Custom Circuit Design.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2017
End-to-End Analysis of Integration for Thermocouple-Based Sensors Into 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A content addressable memory with multi-Vdd scheme for low power tunable operation.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2015
A methodology for power characterization of associative memories.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015


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