Siddharth Nilakantan

Orcid: 0000-0003-1067-700X

According to our database1, Siddharth Nilakantan authored at least 9 papers between 2011 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2018
SynchroTrace: Synchronization-Aware Architecture-Agnostic Traces for Lightweight Multicore Simulation of CMP and HPC Workloads.
ACM Trans. Archit. Code Optim., 2018

2015
Epoch Profiles: Microarchitecture-Based Application Analysis and Optimization.
IEEE Comput. Archit. Lett., 2015

Effects of Nondeterminism in Hardware and Software Simulation with Thread Mapping.
Proceedings of the 28th International Conference on VLSI Design, 2015

Can You Trust Your Memory Trace? A Comparison of Memory Traces from Binary Instrumentation and Simulation.
Proceedings of the 28th International Conference on VLSI Design, 2015

Synchrotrace: synchronization-aware architecture-agnostic traces for light-weight multicore simulation.
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

2014
Static thread mapping for NoCs via binary instrumentation traces.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

2013
Metrics for Early-Stage Modeling of Many-Accelerator Architectures.
IEEE Comput. Archit. Lett., 2013

Platform-independent analysis of function-level communication in workloads.
Proceedings of the IEEE International Symposium on Workload Characterization, 2013

2011
Evaluation of an accelerator architecture for speckle reducing anisotropic diffusion.
Proceedings of the 14th International Conference on Compilers, 2011


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