Siddharth Katare

According to our database, Siddharth Katare authored at least 4 papers between 2012 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Novel Framework for Modelling High Speed Interface Using Python for Architecture Evaluation.

Siddharth Katare

Proceedings of the 2020 IEEE Region 10 Conference, 2020

2019

Configurable Hybrid Output Driver for GPIO with Wide Supply Voltage Range of 1.05V-3.70V.

Siddharth Katare, Nagaveni Subramanya

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2014

Resistorless on-die high voltage power supply noise measurement.

Raj S. Dua, Siddharth Katare, Narayanan Natarajan

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

2012

Current equalization scheme for parallel low-dropout regulators.

Siddharth Katare, Narayanan Natarajan

Proceedings of the International SoC Design Conference, 2012