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Siddharth Joshi

Affiliations:
  • Indian Institute of Technology, Department of Electrical Engineering, Bombay, Mumbai, India


According to our database1, Siddharth Joshi authored at least 2 papers between 2010 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2011
Double Precision Sparse Matrix Vector Multiplication Accelerator on FPGA.
[BibTeX]
Sumedh Attarde
,
Siddharth Joshi
,
Yash Deshpande
,
Sunil Puranik
,
Sachin B. Patkar
Proceedings of the PECCS 2011, 2011

2010
FPGA Based High Performance Double-Precision Matrix Multiplication.
[BibTeX]
[DOI]
Vinay B. Y. Kumar
,
Siddharth Joshi
,
Sachin B. Patkar
,
H. Narayanan
Int. J. Parallel Program., 2010


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