Siau Ben Chiah

According to our database1, Siau Ben Chiah authored at least 9 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Composite Sub-surface Model for RF GaN-HEMTs.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023
Scalable Compact Model for High-frequency GaN-HEMTs.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2021
Enabling Monolithic Heterogeneously Integrated Si/III-V Technology Platform.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2019
Monolithic Co-integration of III-V Materials into Foundry Si-CMOS in a Single Chip for Novel Integrated Circuits.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2017
Automatic place-and-route of emerging LED-driven wires within a monolithically-integrated CMOS-III-V process.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
An on-chip integrated III-V / CMOS 125MSps 6-bit SAR ADC.
Proceedings of the International Symposium on Integrated Circuits, 2016

Effect of metal work function on the DC characteristics of an asymmetric MOSFET with Schottky-based source.
Proceedings of the International Symposium on Integrated Circuits, 2016

2014
Compact Fermi potential model for heterostructure HEMTs with rectangular quantum well.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Top-down drift-diffusion versus bottom-up quasi-ballistic formalism in device compact modeling.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013


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