Shushan Qiao
Orcid: 0000-0002-9102-2111
According to our database1,
Shushan Qiao
authored at least 62 papers
between 2010 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
A Self-Calibrated Unified Voltage-and-Frequency Regulator System Design Based on Universal Logic Line Circuit.
IEEE Trans. Very Large Scale Integr. Syst., February, 2025
Subset-Selection Weight Post-Training Quantization Method for Learned Image Compression Task.
IEEE Access, 2025
2024
A 1-8b Reconfigurable Digital SRAM Compute-in-Memory Macro for Processing Neural Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024
An Ultra-Low Leakage and Wide-Range Voltage Level Shifter for Low-Power Digital CMOS VLSIs.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
A Low-Power and Low-Latency Speech Feature Extractor Based on Time-Domain Filter Bank.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
IEEE Trans. Geosci. Remote. Sens., 2024
IEEE Trans. Geosci. Remote. Sens., 2024
Differentiable architecture search with multi-dimensional attention for spiking neural networks.
Neurocomputing, 2024
A dynamic voltage scaling circuit design based on critical path replica and time warning techniques.
IEICE Electron. Express, 2024
An Ultra-Low-Power Static Contention-Free 25-Transistor True Single-Phase-Clocked Flip-Flop in 55 nm CMOS.
IEEE Access, 2024
A Dual-Wordline 6T SRAM Computing-In-Memory Macro Featuring Full Signed Multi-Bit Computation for Lightweight Networks.
IEEE Access, 2024
A 409mV, Sub-10nW Power-on Reset Circuit Using Adaptive Accuracy Adjustment for Low Voltage Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024
SSPE: A Device-edge SNN Inference Artificial Intelligence Processor in Supporting Smart Computing.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024
RCPE: An Excellent Performance Training Processor with RISC-V based Compression Mechanism.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
RTPE: A High Energy Efficiency Inference Processor with RISC-V based Transformation Mechanism.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
A novel high-speed low-power sense-amplifier-based flip-flop for digital circuits application.
IEICE Electron. Express, December, 2023
A capacitor-coupled stacked-based sense amplifier with enhanced offset tolerance for low power SRAM.
IEICE Electron. Express, 2023
A low-overhead in-situ timing-error prediction technique with wide-voltage-range transition-detector for variation-tolerant digital circuits.
IEICE Electron. Express, 2023
A 0.8-6Gb/s wireline receiver based on the spectrum-balancing equalizer and semi-digital dual loop CDR.
IEICE Electron. Express, 2023
AMA-Det: Enhancing Shared Head of One-Stage Object Detection With Adaptation, Merging, and Alignment.
IEEE Access, 2023
An Ultra-Small Area and High-Sensitivity Wireless Receiver for ISM and MICS Band Application.
IEEE Access, 2023
Proceedings of the 24th Annual Conference of the International Speech Communication Association, 2023
Multi-grained Backend Fusion for Manipulation Region Location of Partially Fake Audio.
Proceedings of the Workshop on Deepfake Audio Detection and Analysis co-located with 32th International Joint Conference on Artificial Intelligence (IJCAI 2023), 2023
2022
IEICE Trans. Electron., November, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Error-Diffusion Based Speech Feature Quantization for Small-Footprint Keyword Spotting.
IEEE Signal Process. Lett., 2022
Correction: Zhang et al. A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components. Sensors 2022, 22, 5852.
Sensors, 2022
A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components.
Sensors, 2022
A two-dimension half-select free 12T SRAM cell with enhanced write ability and read stability for bit-interleaving architecture.
IEICE Electron. Express, 2022
A fully integrated GaAs HBT power amplifier with enhanced efficiency for 5-GHz WLAN applications.
IEICE Electron. Express, 2022
IEICE Electron. Express, 2022
IEICE Electron. Express, 2022
IEICE Electron. Express, 2022
IEICE Electron. Express, 2022
Low-complex and Highly-performed Binary Residual Neural Network for Small-footprint Keyword Spotting.
Proceedings of the 23rd Annual Conference of the International Speech Communication Association, 2022
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
Low-Power Retentive True Single-Phase-Clocked Flip-Flop With Redundant-Precharge-Free Operation.
IEEE Trans. Very Large Scale Integr. Syst., 2021
IEICE Trans. Inf. Syst., 2021
Area-energy efficient CORDICs using new elementary-angle-set and base-2 exponent expansions scheme.
IEICE Electron. Express, 2021
A 8.83nW, 0.14ppm/℃ crystal oscillator using duty-cycling automatic amplitude control.
IEICE Electron. Express, 2021
IEEE Access, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
IEEE Trans. Circuits Syst., 2020
Erratum: A low-overhead error detection and correction technique with a relaxed error timing constraint for variation-tolerance [IEICE Electronics Express Vol. 16 (2019) No. 14 pp. 20190342].
IEICE Electron. Express, 2020
Erratum: Snake: An asynchronous pipeline for ultra-low-power applications [IEICE Electronics Express Vol. 16 (2019) No. 12 pp. 20190293].
IEICE Electron. Express, 2020
IEICE Electron. Express, 2020
A 8bits, 6.2ps resolution two-step time-to-digital converter with set-reset-based arbiters and signal tracking mechanism.
IEICE Electron. Express, 2020
2019
A low-overhead error detection and correction technique with a relaxed error timing constraint for variation-tolerance.
IEICE Electron. Express, 2019
IEICE Electron. Express, 2019
IEICE Electron. Express, 2019
IEICE Electron. Express, 2019
2018
A practical, low-overhead, one-cycle correction design method for variation-tolerant digital circuits.
IEICE Electron. Express, 2018
IEICE Electron. Express, 2018
A low power and glitch-free circular rotation phase modulator for outphasing transmitter.
IEICE Electron. Express, 2018
A robust, subthreshold 12T SRAM bitcell with BL leakage compensation and bit-interleaving capability.
IEICE Electron. Express, 2018
2017
An improved phase digitization mechanism for fast-locking low-power all-digital PLLs.
IEICE Electron. Express, 2017
2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2010
J. Commun., 2010