Shujiang Ji

According to our database, Shujiang Ji authored at least 6 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Analysis and Design of a Sub-Sampling PLL of Low Phase Noise and Low Reference Spur.

Hao Xu, Shujiang Ji, Yizhuo Wang, Xinyi Lin, Hao Min, Na Yan

IEEE Trans. Circuits Syst. I Regul. Pap., August, 2024

2023

Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9-14.3-GHz 85-fs-rms Jitter PLL.

Yizhuo Wang, Jiahe Shi, Hao Xu, Shujiang Ji, Yiyun Mao, Tenghao Zou, Jun Tao, Hao Min, Na Yan

IEEE J. Solid State Circuits, 2023

2022

A Highly Integrated Passive Wireless Sensing System With Synchronized Data Streaming of Multiple Tags.

Kuanfeng Tang, Maodong Wang, Meng Liu, Chao Zhang, Shengliang Xu, Shujiang Ji, Sijia Lai, Na Yan, Hao Min, Jin Mitsugi

IEEE Internet Things J., 2022

2021

A novel method to improve the subcarrier frequency accuracy for UHF RFID sensing system.

Kuanfeng Tang, Chao Zhang, Maodong Wang, Shengliang Xu, Shujiang Ji, Na Yan, Hao Min, Jin Mitsugi

Proceedings of the IEEE International Conference on RFID, 2021

A 7.9-14.3GHz -243.3dB FoMT Sub-Sampling PLL with Transformer-Based Dual-Mode VCO in 40nm CMOS.

Yizhuo Wang, Tenghao Zou, Bowen Chen, Shujiang Ji, Chao Zhang, Na Yan

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020

A Novel Charge Pump with Ultra-Low Current Mismatch and Variation for PLL.

Shujiang Ji, Yuxiao Zhao, Wenjie Xu, Na Yan, Hao Min

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020