Shuilong Huang
According to our database1,
Shuilong Huang
authored at least 6 papers
between 2006 and 2023.
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Bibliography
2023
A 16.5-μW 73.7-dB-SNDR Second-Order Fully Passive Noise-Shaping SAR ADC With a Hybrid Switching Procedure.
IEEE Access, 2023
2017
11b 60 MHz pipelined ADC with inverter-based class AB amplifier in 28 nm CMOS technology.
IEICE Electron. Express, 2017
2008
System Design Considerations of Highly-Integrated SigmaDelta fractional-n Frequency synthesizer.
J. Circuits Syst. Comput., 2008
2007
A dual-slope PFD/CP frequency synthesizer architecture with an adaptive self-tuning algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Modeling and simulation to the design of SigmaDelta fractional-N frequency synthesizer.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
A Fast 1.9 GHz Fractional-N/Integer Frequency Synthesizer with a Self-tuning Algorithm.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006