Shuhei Iwade

According to our database, Shuhei Iwade authored at least 10 papers between 1994 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A study on fast motion estimation algorithm.

Masahiro Hiramori, Ryota Bandou, Shuhei Iwade, Hiroshi Makino, Tsutomu Yoshimura, Yoshio Matsuda

Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

A study on motion estimation algorithm for moving pictures.

Ryota Bnadou, Masahiro Hiramori, Shuhei Iwade, Hiroshi Makino, Tutomu Yoshimura, Yoshio Matsuda

Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

2014

Energy Efficient Stepwise Charging of a Capacitor Using a DC-DC Converter With Consecutive Changes of its Duty Ratio.

Shunji Nakata, Hiroshi Makino, Junpei Hosokawa, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013

Analysis of Pull-in Range Limit by Charge Pump Mismatch in a Linear Phase-Locked Loop.

Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino, Yoshio Matsuda

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012

Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield.

Hiroshi Makino, Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, Masayuki Miyama, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda

IET Circuits Devices Syst., 2012

2011

Reexamination of SRAM Cell Write Margin Definitions in View of Predicting the Distribution.

Hiroshi Makino, Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, Masayuki Miyama, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda

IEEE Trans. Circuits Syst. II Express Briefs, 2011

2004

A 90-nm low-power 32-kB embedded SRAM with gate leakage suppression circuit for mobile applications.

Koji Nii, Yasumasa Tsukamoto, Tomoaki Yoshizawa, Susumu Imaoka, Yoshinobu Yamagami, Toshikazu Suzuki, Akinori Shibayama, Hiroshi Makino, Shuhei Iwade

IEEE J. Solid State Circuits, 2004

1999

The D30V/MPEG multimedia processor.

Hidehiro Takata, Tetsuya Watanabe, Tetsuo Nakajima, Takashi Takagaki, Hisakazu Sato, Atsushi Mohri, Akira Yamada, Toshiki Kanamoto, Yoshio Matsuda, Shuhei Iwade, Yasutaka Horiba

IEEE Micro, 1999

1995

A novel memory cell for multiport RAM on 0.5 μm CMOS Sea-of-Gates.

Koji Nii, Hideshi Maeno, Tokuya Osawa, Shuhei Iwade, Shinpei Kayano, Hiroshi Shibata

IEEE J. Solid State Circuits, March, 1995

1994

A high-density data-path generator with stretchable cells.

Yoshiki Tsujihashi, Hisashi Matsumoto, Hidekatsu Nishimaki, Atsushi Miyanishi, Hiroomi Nakao, Osamu Kitada, Shuhei Iwade, Shinpei Kayano, Masayoshi Sakao

IEEE J. Solid State Circuits, January, 1994