Shugang Wei

According to our database, Shugang Wei authored at least 28 papers between 1990 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Novel Binary Signed-Digit Addition Algorithm for FPGA Implementation.

Yuuki Tanaka, Yuuki Suzuki, Shugang Wei

J. Circuits Syst. Comput., 2020

2016

Computation of modular multiplicative inverses using residue signed-digit additions.

Shugang Wei

Proceedings of the International SoC Design Conference, 2016

2015

Fast signed-digit arithmetic circuits for residue number systems.

Shugang Wei

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2014

Efficient squaring circuit using canonical signed-digit number representation.

Yuuki Tanaka, Shugang Wei

IEICE Electron. Express, 2014

Conversions between RNS and mixed-radix numbers using signed-digit arithmetic.

Shugang Wei

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

2013

High-Speed Modular Multipliers Based on a New Binary Signed-Digit Adder Tree Structure.

Mingda Zhang, Shugang Wei

J. Circuits Syst. Comput., 2013

RESIDUE-WEIGHTED NUMBER CONVERSION FOR MODULI SET {2ⁿ-1, 2ⁿ + 1, 2²ⁿ + 1, 2ⁿ} USING SIGNED-DIGIT NUMBER.

Changjun Jiang, Shugang Wei

J. Circuits Syst. Comput., 2013

2012

Residue-weighted number conversion for moduli set {22ⁿ - 1, 2²ⁿ⁺¹ - 1, 2ⁿ} using signed-digit number.

Changjun Jiang, Shugang Wei

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

An RSA encryption implementation method using residue signed-digit arithmetic circuits.

Shugang Wei

Proceedings of the 5th International Conference on BioMedical Engineering and Informatics, 2012

2011

Efficient residue checker using new binary modular adder tree structure for error detection of arithmetic.

Mingda Zhang, Shugang Wei

Proceedings of the Eighth International Conference on Fuzzy Systems and Knowledge Discovery, 2011

2006

Modulo (2^p plusminus 1) Multipliers Using a Three-operand Modular Signed-digit Addition Algorithm.

Shugang Wei, Kensuke Shimizu

J. Circuits Syst. Comput., 2006

Performance Evaluation of Signed-Digit Architecture for Weighted-to-Residue and Residue-to-Weighted Number Converters with Moduli Set (2^<i>n</i>-1, 2^<i>n</i>, 2^<i>n</i>+1).

Shuangching Chen, Shugang Wei

Inf. Media Technol., 2006

New Booth Modulo <i>m</i> Multipliers with Signed-Digit Number Arithmetic.

Shuangching Chen, Shugang Wei

Inf. Media Technol., 2006

Weighted-to-residue and residue-to-weighted converters with three-moduli (2ⁿ-1, 2ⁿ, 2ⁿ+1) signed-digit architectures.

Shuangching Chen, Shugang Wei

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

Dynamic Range Compression Characteristics Using an Interpolating Polynomial for Digital Audio Systems.

Shugang Wei, Kensuke Shimizu

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Number conversions between RNS and mixed-radix number system based on Modulo (2^{p - 1}) signed-digit arithmetic.

Shugang Wei

Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

2003

Residue Checker with Signed-Digit Arithmetic for Error Detection of Arithmetic Circuits.

Shugang Wei, Kensuke Shimizu

J. Circuits Syst. Comput., 2003

Modulo (2^p ± 1) multipliers using a three-operand modular addition and Booth recoding based on signed-digit number arithmetic.

Shugang Wei, Kensuke Shimizu

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Residue signed-digit arithmetic circuit with a complement of modulus and the application to RSA encryption processor.

Shugang Wei, Kensuke Shimizu

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Fast modular multiplication using Booth recoding based on signed-digit number arithmetic.

Shugang Wei, Shuangching Chen, Kensuke Shimizu

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001

Fast residue arithmetic multipliers based on signed-digit number system.

Shugang Wei, Kensuke Shimizu

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Error Detection of Arithmetic Circuits Using a Residue Checker with Signed-Digit Number System.

Shugang Wei, Kensuke Shimizu

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

2000

Residue arithmetic circuits using a signed-digit number representation.

Shugang Wei, Kensuke Shimizu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

Residue Arithmetic Multiplier Based on the Radix-4 Signed-Digit Multiple-Valued Arithmetic Circuits.

Shugang Wei, Kensuke Shimizu

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation.

Shugang Wei, Kensuke Shimizu

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1998

Residue Arithmetic Circuits Based on the Signed-Digit Multiple-Valued Arithmetic Circuits.

Shugang Wei, Kensuke Shimizu

Proceedings of the 28th IEEE International Symposium on Multiple-Valued Logic, 1998

1991

Performance evaluation of a multivalued rsa encryption vlsi.

Shugang Wei, Michitaka Kameyama, Tatsuo Higuchi

Syst. Comput. Jpn., 1991

1990

Design of an RSA Encryption Processor Based on Signed-Digit Multivalued Arithmetic Circuits.

Michitaka Kameyama, Shugang Wei, Tatsuo Higuchi

Syst. Comput. Jpn., 1990