Shuchang Shan

According to our database, Shuchang Shan authored at least 5 papers between 2011 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Partial-SET: Write speedup of PCM main memory.

Bing Li, Shuchang Shan, Yu Hu, Xiaowei Li

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

WADE: Writeback-aware dynamic cache management for NVM-based main memory system.

Zhe Wang, Shuchang Shan, Ting Cao, Junli Gu, Yi Xu, Shuai Mu, Yuan Xie, Daniel A. Jiménez

ACM Trans. Archit. Code Optim., 2013

A Fault-Tolerant Routing Algorithm Design for On-Chip Optical Networks.

Dong Xiang, Yan Zhang, Shuchang Shan, Yi Xu

Proceedings of the IEEE 32nd Symposium on Reliable Distributed Systems, 2013

Tolerating Noise in MLC PCM with Multi-Bit Error Correction Code.

Bing Li, Shuchang Shan, Yu Hu, Xiaowei Li

Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

2011

Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors.

Shuchang Shan, Yu Hu, Xiaowei Li

Proceedings of the 2011 IEEE/IFIP International Conference on Dependable Systems and Networks, 2011