Shuangyi Wu

According to our database1, Shuangyi Wu authored at least 7 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2019
A Bandwidth Mismatch Optimization Technique in Time-Interleaved Analog-to-Digital Converters.
J. Circuits Syst. Comput., 2019

2014
A Digital Timing Mismatch Calibration Technique in Time-Interleaved ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Multiscaling coefficients Technique for gain error Background Calibration in Pipelined ADC.
J. Circuits Syst. Comput., 2014

A dithering Technique for Sha_less Pipelined ADC.
J. Circuits Syst. Comput., 2014

Digital Background Calibration for Timing skew in Time-Interleaved ADC.
J. Circuits Syst. Comput., 2014

A digital background calibration technique for SAR ADC based on capacitor swapping.
IEICE Electron. Express, 2014

A 10-bit 100MS/s subrange SAR ADC with time-domain quantization.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014


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