Shuangching Chen
According to our database1,
Shuangching Chen
authored at least 4 papers
between 2002 and 2006.
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Bibliography
2006
Performance Evaluation of Signed-Digit Architecture for Weighted-to-Residue and Residue-to-Weighted Number Converters with Moduli Set (2<sup><i>n</i></sup>-1, 2<sup><i>n</i></sup>, 2<sup><i>n</i></sup>+1).
Inf. Media Technol., 2006
Inf. Media Technol., 2006
Weighted-to-residue and residue-to-weighted converters with three-moduli (2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1) signed-digit architectures.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2002
Fast modular multiplication using Booth recoding based on signed-digit number arithmetic.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002