Shuang Xie

Yong Wang

J. Circuits Syst. Comput., September, 2024

Mahalanobis-Kernel Distance-Based Suppressed Possibilistic C-Means Clustering Algorithm for Imbalanced Image Segmentation.

[BibT_eX]

[DOI]

IEEE Trans. Fuzzy Syst., August, 2024

Traditional or drop-shipping? channel choice and product quality.

[BibT_eX]

[DOI]

Qingyi Wu

Buqing Ma

Int. J. Prod. Res., 2024

A feature-weighted suppressed possibilistic fuzzy c-means clustering algorithm and its application on color image segmentation.

[BibT_eX]

[DOI]

Expert Syst. Appl., 2024

Large Language Models (LLMs): Deployment, Tokenomics and Sustainability.

[BibT_eX]

[DOI]

Haiwei Dong

CoRR, 2024

2023

Tea-YOLOv8s: A Tea Bud Detection Model Based on Deep Learning and Computer Vision.

[BibT_eX]

[DOI]

Hongwei Sun

Sensors, July, 2023

An Efficient Weighted Fuzzy Possibilistic C-Means Clustering Algorithm.

[BibT_eX]

[DOI]

Haiyan Yu

Proceedings of the 6th International Conference on Artificial Intelligence and Pattern Recognition, 2023

Digital Twin Modelling of Cascaded Amplifiers in the COSMOS Testbed.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Advanced Networks and Telecommunications Systems, 2023

2022

A Predictive Noise Shaping SAR ADC with Redundancy.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2022

BJT induced dark current in CMOS image sensors.

[BibT_eX]

[DOI]

Integr., 2022

A digital foreground calibration method for SAR ADCs with redundancy.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2022

2021

UAV Dynamic Path Planning Based on Obstacle Position Prediction in an Unknown Environment.

[BibT_eX]

[DOI]

IEEE Access, 2021

Research on Data Security Technology Based on Blockchain Technology.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE International Conference on Big Data Security on Cloud, 2021

2020

A 10 Bit 5 MS/s Column SAR ADC With Digital Error Correction for CMOS Image Sensors.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2020

A CMOS-Imager-Pixel-Based Temperature Sensor for Dark Current Compensation.

[BibT_eX]

[DOI]

Accel Abarca Prouza

IEEE Trans. Circuits Syst. II Express Briefs, 2020

A CMOS image sensor with a 10 MHz column readout speed using digitally calibrated pipelined ADCs.

[BibT_eX]

[DOI]

Microelectron. J., 2020

Research on Multi-channel Pulse Amplitude Analyzer Based on FPGA.

[BibT_eX]

[DOI]

Proceedings of the Smart Computing and Communication - 5th International Conference, 2020

Generalized Locally-Linear Embedding: A Neural Network Implementation.

[BibT_eX]

[DOI]

Proceedings of the Neural Computing for Advanced Applications, 2020

2019

Compensation for Process and Temperature Dependency in a CMOS Image Sensor.

[BibT_eX]

[DOI]

Sensors, 2019

Real-Time Panoramic Depth Maps from Omni-directional Stereo Images for 6 DoF Videos in Virtual Reality.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Virtual Reality and 3D User Interfaces, 2019

A CMOS Image Sensor with Improved Readout Speed using Column SAR ADC with Digital Error Correction.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Temperature Sensors Incorporated into a CMOS Image Sensor with Column Zoom ADCs.

[BibT_eX]

[DOI]

Xiaoliang Ge

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Effective Convolutional Neural Network Layers in Flow Estimation for Omni-Directional Images.

[BibT_eX]

[DOI]

Proceedings of the 2019 International Conference on 3D Vision, 2019

2018

FISTA-Based PAPR Reduction Method for Tone Reservation's OFDM System.

[BibT_eX]

[DOI]

Yajun Wang

Zhibin Xie

IEEE Wirel. Commun. Lett., 2018

2017

Analysis and calibration of process variations for an array of temperature sensors.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017

2015

An all-digital self-calibrated delay-line based temperature sensor for VLSI thermal sensing and management.

[BibT_eX]

[DOI]

Integr., 2015

2014

Delay-line temperature sensors and VLSI thermal management demonstrated on a 60nm FPGA.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

A Power and Area Efficient 65 nm CMOS delay-Line ADC for on-Chip voltage Sensing.

[BibT_eX]

[DOI]

Sida Amy Shen

J. Circuits Syst. Comput., 2013

A low power all-digital self-calibrated temperature sensor using 65nm FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

A 0.02 nJ self-calibrated 65nm CMOS delay line temperature sensor.

[BibT_eX]

[DOI]