Shu-Yen Lin
Orcid: 0000-0002-0537-9369
According to our database1,
Shu-Yen Lin
authored at least 47 papers
between 2008 and 2024.
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Bibliography
2024
Dynamic Precision-Scalable Thermal Mapping Algorithm for Three Dimensional Systolic-Array Based Neural Network Accelerator.
IEEE Trans. Consumer Electron., February, 2024
A Low-area Hardware and Architecture Design of Truncation- and Rounding-Based Approximate Multiplier for Artificial Intelligence Applications.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2024
Systolic Array-Based Accelerator Architecture Combining Iterative Variable-Width Approximate Multipliers.
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024
2023
Temperature-Prediction Based Rate-Adjusted Time and Space Mapping Algorithm for 3D CNN Accelerator Systems.
IEEE Trans. Computers, October, 2023
Low-area architecture design of multi-mode activation functions with controllable maximum absolute error for neural network applications.
Microprocess. Microsystems, 2023
Multi-Mode AI Accelerator Architecture for Thermal-Aware 3D Stacked Deep Neural Network Design.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023
Object-Location Prediction based on CIE Color Difference for Deep Reinforcement Learning.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023
2022
Thermal-constrained memory management for three-dimensional DRAM-PCM memory with deep neural network applications.
Microprocess. Microsystems, March, 2022
Dynamic Thermal-Predicted Workload Movement with Three-Dimensional DRAM-RRAM Hybrid Memories for Convolutional Neural Network Applications.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022
Building a "Corpus of 7 Types Emotion Co-occurrences Words" of Chinese Emotional Words with Big Data Corpus.
Proceedings of the HCI in Business, Government and Organizations, 2022
Proceedings of the HCI in Business, Government and Organizations, 2022
2020
Correction to: the Video Spatial Error Concealment Algorithm Using Separately-Directional Interpolation Technique.
J. Signal Process. Syst., 2020
Reconfigurable MAC Systolic Array Architecture Design for Three-Dimensional Convolution Neural Network.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020
2019
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019
Dynamic Thermal-Aware Inter-Layer Perpendicular Downward Mapping for Three-Dimensional Convolutional Neural Network Accelerator.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019
2017
The Video Spatial Error Concealment Algorithm Using Separately-Directional Interpolation Technique.
J. Signal Process. Syst., 2017
Design and Implementation of Operation-Reduced LDPC Decoder Based on a Check Node Stopping Scheme.
J. Circuits Syst. Comput., 2017
Thermal- and Performance-Aware Address Mapping for the Multi-Channel Three-Dimensional DRAM Systems.
IEEE Access, 2017
Disease checking method of ECG signals with variable output resolutions for wearable devices.
Proceedings of the IEEE 6th Global Conference on Consumer Electronics, 2017
2016
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016
A reconfigurable near-data systolic array accelerator for the three-dimensional DRAM systems.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016
2015
Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems.
IEEE Trans. Computers, 2015
Block-based SRAM architecture and thermal-aware memory mappings for three-dimensional channel decoding systems.
Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015
Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015
Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Path-Congestion-Aware Adaptive Routing With a Contention Prediction Scheme for Network-on-Chip Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014
Thermal-aware architecture and mapping for multi-channel three-dimensional DRAM systems.
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014
Proceedings of the 14th Conference of the European Chapter of the Association for Computational Linguistics, 2014
2013
Topology-Aware Adaptive Routing for Nonstationary Irregular Mesh in Throttled 3D NoC Systems.
IEEE Trans. Parallel Distributed Syst., 2013
ACM Trans. Embed. Comput. Syst., 2013
Design of thermal management unit with vertical throttling scheme for proactive thermal-aware 3D NoC systems.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013
2012
Phonetic Component Ranking and Pronunciation Rules Discovery for Picto-Phonetic Chinese Characters.
Int. J. Comput. Linguistics Chin. Lang. Process., 2012
Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Traffic-Balanced Topology-Aware Multiple Routing Adjustment for Throttled 3D NOC Systems.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012
2011
A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks.
Des. Autom. Embed. Syst., 2011
Multi-Pheromone ACO-based routing in Network-on-Chip system inspired by economic phenomenon.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
聲符部件排序與形聲字發音規則探勘 (Pronunciation Rules Discovery for Picto-Phonetic Chinese Characters) [In Chinese].
Proceedings of the 23rd Conference on Computational Linguistics and Speech Processing, 2011
2010
Annotating Phonetic Component of Chinese Characters Using Constrained Optimization and Pronunciation Distribution.
Int. J. Comput. Linguistics Chin. Lang. Process., 2010
2009
Assessing Text Readability Using Hierarchical Lexical Relations Retrieved from WordNet.
Int. J. Comput. Linguistics Chin. Lang. Process., 2009
A Scalable Built-in Self-test/Self-diagnosis Architecture for 2D-Mesh based Chip Multiprocessor Systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
IEEE Trans. Computers, 2008
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Proceedings of the 20th Conference on Computational Linguistics and Speech Processing, 2008