Shriram Kulkarni
According to our database1,
Shriram Kulkarni
authored at least 9 papers
between 1996 and 2001.
Collaborative distances:
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Bibliography
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differentiaI-resistance devices.
IEEE J. Solid State Circuits, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
2000
Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices.
Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
Proceedings of the 1999 Design, 1999
1998
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998
1996
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996