Shousheng He

According to our database1, Shousheng He authored at least 7 papers between 1994 and 1999.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

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Bibliography

1999
An Orthogonal Time-Frequency Extraction Approach to 2D Systolic Architecture for 1D DFT Computation.
J. VLSI Signal Process., 1999

1998
Design and implementation of a 1024-point pipeline FFT processor.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1996
Computing partial DFT for comb spectrum evaluation.
IEEE Signal Process. Lett., 1996

A New Approach to Pipeline FFT Processor.
Proceedings of IPPS '96, 1996

1995
VLSI computation of the partial DFT for (de)modulation in multi-channel OFDM system.
Proceedings of the 6th IEEE International Symposium on Personal, 1995

A Pipelined Bit-Serial Complex Multiplier Using Distributed Arithmetic.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
A systolic array implementation of common factor algorithm to compute DFT.
Proceedings of the International Symposium on Parallel Architectures, 1994


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