Shohji Onishi

According to our database, Shohji Onishi authored at least 3 papers between 2000 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation.

Gary S. Ditlow, Robert K. Montoye, Salvatore N. Storino, Sherman M. Dance, Sebastian Ehrenreich, Bruce M. Fleischer, Thomas W. Fox, Kyle M. Holmes, Junichi Mihara, Yutaka Nakamura, Shohji Onishi, Robert Shearer, Dieter F. Wendel, Leland Chang

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2006

Circuit Design Techniques for a First-Generation Cell Broadband Engine Processor.

James D. Warnock, Dieter F. Wendel, Tony Aipperspach, Erwin Behnen, Robert A. Cordes, Sang H. Dhong, Koji Hirairi, Hiroaki Murakami, Shohji Onishi, Dac C. Pham, Jürgen Pille, Stephen D. Posluszny, Osamu Takahashi, Huajun Wen

IEEE J. Solid State Circuits, 2006

2000

1-GHz fully pipelined 3.7-ns address access time 8 k×1024 embedded synchronous DRAM macro.

Osamu Takahashi, Sang H. Dhong, Manabu Ohkubo, Shohji Onishi, Robert H. Dennard, Robert Hannon, Scott Crowder, Subramanian S. Iyer, Matthew R. Wordeman, Bijan Davari, William B. Weinberger, Naoaki Aoki

IEEE J. Solid State Circuits, 2000