Shogo Nakaya

According to our database, Shogo Nakaya authored at least 9 papers between 1996 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

A Non-volatile Reconfigurable Offloader for Wireless Sensor Nodes.

Shogo Nakaya, Makoto Miyamura, Noboru Sakimura, Yuichi Nakamura, Tadahiko Sugibayashi

IPSJ Trans. Syst. LSI Des. Methodol., 2013

Adaptive sensing of ECG signals using R-R interval prediction.

Shogo Nakaya, Yuichi Nakamura

Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2011

Programmable cell array using rewritable solid-electrolyte switch integrated in 90nm CMOS.

Makoto Miyamura, Shogo Nakaya, Munehiro Tada, Toshitsugu Sakamoto, Koichiro Okamoto, Naoki Banno, Shinji Ishida, Kimihiko Ito, Hiromitsu Hada, Noboru Sakimura, Tadahiko Sugibayashi, Masato Motomura

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2001

Arithmetic Operation Oriented Reconfigurable Chip: RHW.

Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara

Proceedings of the Field-Programmable Logic and Applications, 2001

2000

Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW.

Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1998

A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI.

Isamu Kajitani, Tsutomu Hoshino, Daisuke Nishikawa, Hiroshi Yokoi, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Masaya Iwata, Didier Keymeulen, Tetsuya Higuchi

Proceedings of the Evolvable Systems: From Biology to Hardware, 1998

Evolvable Hardware Chip for High Precision Printer Image Compression.

Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Tetsuya Higuchi

Proceedings of the Fifteenth National Conference on Artificial Intelligence and Tenth Innovative Applications of Artificial Intelligence Conference, 1998

1996

SOP: An Adaptive Massively Parallel Computer and its Control-Data-Flow Based Compiling Method.

Tsukasa Yamauchi, Shogo Nakaya, Nobuki Kajihara

Proceedings of the Parcella 1996, 1996

SOP: a reconfigurable massively parallel system and its control-data-flow based compiling method.

Tsukasa Yamauchi, Shogo Nakaya, Nobuki Kajihara

Proceedings of the 4th IEEE Symposium on FPGAs for Custom Computing Machines (FCCM '96), 1996