Sho Endo

Affiliations:

Tohoku University, Sendai, Japan

According to our database¹, Sho Endo authored at least 9 papers between 2011 and 2015.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Bibliography

2015

A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Electromagnetic Analysis against Public-Key Cryptographic Software on Embedded OS.

[BibT_eX]

[DOI]

IEICE Trans. Commun., 2015

An Adaptive Multiple-Fault Injection Attack on Microcontrollers and a Countermeasure.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

2014

A Multiple-Fault Injection Attack by Adaptive Timing Control Under Black-Box Conditions and a Countermeasure.

[BibT_eX]

[DOI]

Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2014

2013

Exploring the Relations between Fault Sensitivity and Power Consumption.

[BibT_eX]

[DOI]

Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2013

2012

A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012

An Efficient Countermeasure against Fault Sensitivity Analysis Using Configurable Delay Blocks.

[BibT_eX]

[DOI]

Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

2011

An on-chip glitchy-clock generator for testing fault injection attacks.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2011

Acceleration of FDTD Method Using a Novel Algorithm on the Cell B.E.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2011

Sho Endo

Timeline

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