Shixuan Zheng
Orcid: 0000-0003-2991-8678
According to our database1,
Shixuan Zheng
authored at least 11 papers
between 2017 and 2022.
Collaborative distances:
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Bibliography
2022
Atomic Dataflow based Graph-Level Workload Orchestration for Scalable DNN Accelerators.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022
2021
A novel adaptive code block group hybrid automatic repeat request scheme for low earth orbit satellite networks.
Int. J. Satell. Commun. Netw., 2021
Multi-Scene Doppler Power Spectrum Modeling of LEO Satellite Channel Based on Atlas Fingerprint Method.
IEEE Access, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
2019
An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A 5.1pJ/Neuron 127.3us/Inference RNN-based Speech Recognition Processor using 16 Computing-in-Memory SRAM Macros in 65nm CMOS.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
Proceedings of the 2019 International Conference on Indoor Positioning and Indoor Navigation, 2019
2018
A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications.
IEEE J. Solid State Circuits, 2018
A 141 UW, 2.46 PJ/Neuron Binarized Convolutional Neural Network Based Self-Learning Speech Recognition Processor in 28NM CMOS.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
An efficient kernel transformation architecture for binary- and ternary-weight neural network inference.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017