Shiwei Liu

According to our database, Shiwei Liu authored at least 7 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer.

Shiwei Liu, Chen Mu, Hao Jiang, Yunzhengmao Wang, Jinshan Zhang, Feng Lin, Keji Zhou, Qi Liu, Chixiao Chen

IEEE Trans. Very Large Scale Integr. Syst., February, 2024

2023

A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine.

Shiwei Liu, Peizhe Li, Jinshan Zhang, Yunzhengmao Wang, Haozhe Zhu, Wenning Jiang, Shan Tang, Chixiao Chen, Qi Liu, Ming Liu

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration.

Jie Liao, Bo Jiao, Jinshan Zhang, Shiwei Liu, Hao Jiang, Jun Tao, Wenning Jiang, Qi Liu, Lihua Zhang, Haozhe Zhu, Chixiao Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

A 200M-Query-Vector/s Computing-in-RRAM ADC-less k-Nearest-Neighbor Accelerator with Time-Domain Winner-Takes-All Circuits.

Chen Mu, Yunzhengmao Wang, Jiapei Zheng, Shiwei Liu, Keji Zhou, Shan Tang, Chixiao Chen, Qi Liu

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

Systolic-Array Deep-Learning Acceleration Exploring Pattern-Indexed Coordinate-Assisted Sparsity for Real-Time On-Device Speech Processing.

Shiwei Liu, Zihao Zhao, Yanhong Wang, Qiaosha Zou, Yiyun Zhang, Chuanjin Richard Shi

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020

A Communication-Aware DNN Accelerator on ImageNet Using In-Memory Entry-Counting Based Algorithm-Circuit-Architecture Co-Design in 65-nm CMOS.

Haozhe Zhu, Chixiao Chen, Shiwei Liu, Qiaosha Zou, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Chuanjin Richard Shi

IEEE J. Emerg. Sel. Topics Circuits Syst., 2020

XNORAM: An Efficient Computing-in-Memory Architecture for Binary Convolutional Neural Networks with Flexible Dataflow Mapping.

Shiwei Liu, Haozhe Zhu, Chixiao Chen, Lihua Zhang, Chuanjin Richard Shi

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020