Shivam Bhasin

Romain Poussier

IACR Cryptol. ePrint Arch., 2020

On Exploiting Message Leakage in (few) NIST PQC Candidates for Practical Message Recovery and Key Recovery Attacks.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2020

Drop by Drop you break the rock - Exploiting generic vulnerabilities in Lattice-based PKE/KEMs using EM-based Physical Attacks.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2020

DNFA: Differential No-Fault Analysis of Bit Permutation Based Ciphers Assisted by Side-Channel.

[BibT_eX]

[DOI]

Xiaolu Hou

IACR Cryptol. ePrint Arch., 2020

A Novel Duplication Based Countermeasure To Statistical Ineffective Fault Analysis.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2020

Fault Attacks In Symmetric Key Cryptosystems.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2020

Feeding Three Birds With One Scone: A Generic Duplication Based Countermeasure To Fault Attacks (Extended Version).

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2020

Secure Your SoC: Building System-an-Chip Designs for Security.

[BibT_eX]

[DOI]

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

Authentication Protocol for Secure Automotive Systems: Benchmarking Post-Quantum Cryptography.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Practical Reverse Engineering of Secret Sboxes by Side-Channel Analysis.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Learning From A Big Brother - Mimicking Neural Networks in Profiled Side-channel Analysis.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Practical Side-Channel Based Model Extraction Attack on Tree-Based Machine Learning Algorithm.

[BibT_eX]

[DOI]

Proceedings of the Applied Cryptography and Network Security Workshops, 2020

2019

Automatic Characterization of Exploitable Faults: A Machine Learning Approach.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Forensics Secur., 2019

Combining PUF with RLUTs: A Two-party Pay-per-device IP Licensing Scheme on FPGAs.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2019

The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019

Make Some Noise. Unleashing the Power of Convolutional Neural Networks for Profiled Side-channel Analysis.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019

CC Meets FIPS: A Hybrid Test Methodology for First Order Side Channel Analysis.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

SCADFA: Combined SCA+DFA Attacks on Block Ciphers with Practical Validations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

Security is an architectural design constraint.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2019

Kilroy was here: The First Step Towards Explainability of Neural Networks in Profiled Side-channel Analysis.

[BibT_eX]

[DOI]

Daan van der Valk

IACR Cryptol. ePrint Arch., 2019

Generic Side-channel attacks on CCA-secure lattice-based PKE and KEM schemes.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

Exploiting Determinism in Lattice-based Signatures - Practical Fault Attacks on pqm4 Implementations of NIST candidates.

[BibT_eX]

[DOI]

Mahabir Prasad Jhanwar

James Howe

IACR Cryptol. ePrint Arch., 2019

Improving Speed of Dilithium's Signing Procedure.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

One Fault is All it Needs: Breaking Higher-Order Masking with Persistent Fault Analysis.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

SoK : On DFA Vulnerabilities of Substitution-Permutation Networks.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

On Misuse of Nonce-Misuse Resistance: Adapting Differential Fault Attacks on (few) CAESAR Winners.

[BibT_eX]

[DOI]

Mustafa Khairallah

IACR Cryptol. ePrint Arch., 2019

Experimental Evaluation of Deep Neural Network Resistance Against Fault Injection Attacks.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

Mind the Portability: A Warriors Guide through Realistic Profiled Side-channel Analysis.

[BibT_eX]

[DOI]

Ritu Ranjan Shrivastwa

IACR Cryptol. ePrint Arch., 2019

Enhancing Fault Tolerance of Neural Networks for Security-Critical Applications.

[BibT_eX]

[DOI]

CoRR, 2019

CSI NN: Reverse Engineering of Neural Network Architectures Through Electromagnetic Side Channel.

[BibT_eX]

[DOI]

Proceedings of the 28th USENIX Security Symposium, 2019

Lightweight Secure-Boot Architecture for RISC-V System-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

On Comparison of Countermeasures against Statistical Ineffective Fault Attacks.

[BibT_eX]

[DOI]

Mustafa Khairallah

Karim M. Abdellatif

Proceedings of the 31st International Conference on Microelectronics, 2019

Precise Spatio-Temporal Electromagnetic Fault Injections on Data Transfers.

[BibT_eX]

[DOI]

Proceedings of the 2019 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2019

Number "Not Used" Once - Practical Fault Attack on pqm4 Implementations of NIST Candidates.

[BibT_eX]

[DOI]

Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2019

Poster: When Adversary Becomes the Guardian - Towards Side-channel Security With Adversarial Attacks.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security, 2019

Poster: Recovering the Input of Neural Networks via Single Shot Side-channel Attacks.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security, 2019

Fluctuating Power Logic: SCA Protection by $V_{DD}$ Randomization at the Cell-level.

[BibT_eX]

[DOI]

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2019

2018

Toward Threat of Implementation Attacks on Substation Security: Case Study on Fault Detection and Isolation.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Informatics, 2018

Persistent Fault Analysis on Block Ciphers.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

The Conflicted Usage of RLUTs for Security-Critical Applications on FPGA.

[BibT_eX]

[DOI]

J. Hardw. Syst. Secur., 2018

Side-channel Assisted Existential Forgery Attack on Dilithium - A NIST PQC candidate.

[BibT_eX]

[DOI]

Mahabir Prasad Jhanwar

James Howe

IACR Cryptol. ePrint Arch., 2018

Number "Not" Used Once - Key Recovery Fault Attacks on LWE Based Lattice Cryptographic Schemes.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2018

On the Performance of Deep Learning for Side-channel Analysis.

[BibT_eX]

[DOI]

Ioannis Petros Samiotis

IACR Cryptol. ePrint Arch., 2018

On Side-Channel Vulnerabilities of Bit Permutations: Key Recovery and Reverse Engineering.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2018

CSI Neural Network: Using Side-channels to Recover Your Artificial Neural Network Information.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2018

Protecting Block Ciphers against Differential Fault Attacks without Re-keying (Extended Version).

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2018

Online Detection and Reactive Countermeasure for Leakage from BPU Using TVLA.

[BibT_eX]

[DOI]

Sarani Bhattacharya

Debdeep Mukhopadhyay

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

On the Performance of Convolutional Neural Networks for Side-Channel Analysis.

[BibT_eX]

[DOI]

Ioannis Petros Samiotis

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2018

PPAP and iPPAP: PLL-Based Protection Against Physical Attacks.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Guessing Your PIN Right: Unlocking Smartphones with Publicly Available Sensor Data.

[BibT_eX]

[DOI]

David Berend

Bernhard Jungk

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Feature Selection Methods for Non-Profiled Side-Channel Attacks on ECC.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

Protecting block ciphers against differential fault attacks without re-keying.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Breaking Redundancy-Based Countermeasures with Random Faults and Power Side Channel.

[BibT_eX]

[DOI]

Proceedings of the 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2018

DFARPA: Differential fault attack resistant physical design automation.

[BibT_eX]

[DOI]

Rajat Subhra Chakraborty

Debdeep Mukhopadhyay

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Practical Fault Attack on Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, 2018

On Comparing Side-channel Properties of AES and ChaCha20 on Microcontrollers.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017

Practical Evaluation of FSE 2016 Customized Encoding Countermeasure.

[BibT_eX]

[DOI]

Thomas Peyrin

IACR Trans. Symmetric Cryptol., 2017

Cryptographically Secure Shield for Security IPs Protection.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Attacks in Reality: the Limits of Concurrent Error Detection Codes Against Laser Fault Injection.

[BibT_eX]

[DOI]

J. Hardw. Syst. Secur., 2017

Extensive Laser Fault Injection Profiling of 65 nm FPGA.

[BibT_eX]

[DOI]

J. Hardw. Syst. Secur., 2017

A study on analyzing side-channel resistant encoding schemes with respect to fault attacks.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2017

One Plus One is More than Two: A Practical Combination of Power and Fault Analysis Attacks on PRESENT and PRESENT-like Block Ciphers.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2017

A Practical Fault Attack on ARX-like Ciphers with a Case Study on ChaCha20.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2017

SCADPA: Side-Channel Assisted Differential-Plaintext Attack on Bit Permutation Based Ciphers.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2017

Template Attack on Blinded Scalar Multiplication with Asynchronous perf-ioctl Calls.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2017

There Goes Your PIN: Exploiting Smartphone Sensor Fusion Under Single and Cross User Setting.

[BibT_eX]

[DOI]

David Berend

Bernhard Jungk

IACR Cryptol. ePrint Arch., 2017

Low-cost design of stealthy hardware trojan for bit-level fault attacks on block ciphers.

[BibT_eX]

[DOI]

Sci. China Inf. Sci., 2017

Transistor level SCA-resistant scheme based on fluctuating power logic.

[BibT_eX]

[DOI]

Sci. China Inf. Sci., 2017

An Industrial Outlook on Challenges of Hardware Security in Digital Economy - Extended Abstract -.

[BibT_eX]

[DOI]

Victor Lomné

Karim Tobich

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2017

Opening pandora's box: Implication of RLUT on secure FPGA applications and IP security.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2nd International Verification and Security Workshop, 2017

An electromagnetic fault injection sensor using Hogge phase-detector.

[BibT_eX]

[DOI]

Mohammad Nasim Imtiaz Khan

Wei He

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Side-Channel Attack on STTRAM Based Cache for Cryptographic Application.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Don't fall into a trap: Physical side-channel analysis of ChaCha20-Poly1305.

[BibT_eX]

[DOI]

Bernhard Jungk

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

An FPGA-compatible PLL-based sensor against fault injection attack.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

A systematic security analysis of real-time cyber-physical systems.

[BibT_eX]

[DOI]

Arvind Easwaran

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Improved low-entropy masking scheme for LED with mitigation against correlation-enhanced collision attacks.

[BibT_eX]

[DOI]

Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016

Method taking into account process dispersion to detect hardware Trojan Horse by side-channel analysis.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2016

What Lies Ahead: Extending TVLA Testing Methodology Towards Success Rate.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2016

A Novel Methodology for Testing Hardware Security and Trust Exploiting On-Chip Power Noise Measurements (Extended Version).

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2016

Mistakes Are Proof That You Are Trying: On Verifying Software Encoding Schemes' Resistance to Fault Injection Attacks.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2016

Time-Frequency Analysis for Second-Order Attacks.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2016

Comprehensive Laser Sensitivity Profiling and Data Register Bit-Flips for Cryptographic Fault Attacks in 65 Nm FPGA.

[BibT_eX]

[DOI]

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2016

Cheap and Cheerful: A Low-Cost Digital Sensor for Detecting Laser Fault Injection Attacks.

[BibT_eX]

[DOI]

Wei He

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2016

Fault Injection Attacks: Attack Methodologies, Injection Techniques and Protection Mechanisms - A Tutorial.

[BibT_eX]

[DOI]

Debdeep Mukhopadhyay

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2016

Attack sensing against EM leakage and injection.

[BibT_eX]

[DOI]

Noriyuki Miura

Proceedings of the International SoC Design Conference, 2016

The other side of the coin: Analyzing software encoding schemes against fault injection attacks.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

Ring Oscillator under Laser: Potential of PLL-based Countermeasure against Laser Fault Injection.

[BibT_eX]

[DOI]

Proceedings of the 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2016

PLL to the rescue: a novel EM fault countermeasure.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

Does it sound as it claims: a detailed side-channel security analysis of QuadSeal countermeasure.

[BibT_eX]

[DOI]

Darshana Jayasinghe

Sri Parameswaran

Aleksandar Ignjatovic

Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

Bypassing Parity Protected Cryptography using Laser Fault Injection in Cyber-Physical System.

[BibT_eX]

[DOI]

Proceedings of the 2nd ACM International Workshop on Cyber-Physical System Security, 2016

Supervised and unsupervised machine learning for side-channel based Trojan detection.

[BibT_eX]

[DOI]

Wei He

Proceedings of the 27th IEEE International Conference on Application-specific Systems, 2016

2015

Exploiting FPGA Block Memories for Protected Cryptographic Implementations.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2015

Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis.

[BibT_eX]

[DOI]

IET Inf. Secur., 2015

Reconfigurable LUT: Boon or Bane for Secure Applications.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2015

Reconfigurable LUT: A Double Edged Sword for Security-Critical Applications.

[BibT_eX]

[DOI]

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2015

Challenges in designing trustworthy cryptographic co-processors.

[BibT_eX]

[DOI]

Apostolos P. Fournaris

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A survey on hardware trojan detection techniques.

[BibT_eX]

[DOI]

Francesco Regazzoni

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Support vector regression: exploiting machine learning techniques for leakage modeling.

[BibT_eX]

[DOI]

Marc Stöttinger

Proceedings of the Fourth Workshop on Hardware and Architectural Support for Security and Privacy, 2015

Countering early propagation and routing imbalance of DPL designs in a tree-based FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

From theory to practice of private circuit: A cautionary note.

[BibT_eX]

[DOI]

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Linear complementary dual code improvement to strengthen encoded circuit against hardware Trojan horses.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

Fault attacks, injection techniques and tools for simulation.

[BibT_eX]

[DOI]

Roberta Piscitelli

Francesco Regazzoni

Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015

Integrated Sensor: A Backdoor for Hardware Trojan Insertions?

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Hardware trojan detection by delay and electromagnetic measurements.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A novel methodology for testing hardware security and trust exploiting On-Chip Power noise Measurement.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage.

[BibT_eX]

[DOI]

Pirouz Bazargan-Sabet

Jean-Luc Danger

IEICE Trans. Electron., 2014

Hardware Trojan Horses in Cryptographic IP Cores.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2014

Side-Channel Leakage and Trace Compression using Normalized Inter-Class Variance.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2014

Analysis and Improvements of the DPA Contest v4 Implementation.

[BibT_eX]

[DOI]

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2014

Side-channel leakage on silicon substrate of CMOS cryptographic chip.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

A look into SIMON from a side-channel perspective.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Physical Security Evaluation at an Early Design-Phase: A Side-Channel Aware Simulation Methodology.

[BibT_eX]

[DOI]

Proceedings of the International Workshop on Engineering Simulations for Cyber-Physical Systems, 2014

Encoding the state of integrated circuits: a proactive and reactive protection against hardware Trojans horses.

[BibT_eX]

[DOI]

Proceedings of the 9th Workshop on Embedded Systems Security, 2014

DRECON: DPA Resistant Encryption by Construction.

[BibT_eX]

[DOI]

Proceedings of the Progress in Cryptology - AFRICACRYPT 2014, 2014

2013

From cryptography to hardware: analyzing and protecting embedded Xilinx BRAM for cryptographic applications.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2013

NICV: Normalized Inter-Class Variance for Detection of Side-Channel Leakage.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2013

Theory of masking with codewords in hardware: low-weight <i>d</i>th-order correlation-immune Boolean functions.

[BibT_eX]

[DOI]

Claude Carlet

Sylvain Guilley

IACR Cryptol. ePrint Arch., 2013

A low-entropy first-degree secure provable masking scheme for resource-constrained devices.

[BibT_eX]

[DOI]

Proceedings of the Workshop on Embedded Systems Security, 2013

2012

From Cryptography to Hardware: Analyzing Embedded Xilinx BRAM for Cryptographic Applications.

[BibT_eX]

[DOI]

Sylvain Guilley

Jean-Luc Danger

Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Towards Different Flavors of Combined Side Channel Attacks.

[BibT_eX]

[DOI]

Proceedings of the Topics in Cryptology - CT-RSA 2012 - The Cryptographers' Track at the RSA Conference 2012, San Francisco, CA, USA, February 27, 2012

2011

Logic-Level Countermeasures to Secure FPGA based Designs. (Contremesures au niveau logique pour sécuriser les architectures de crypto-processeurs dans un FPGA).

[BibT_eX]

[DOI]