Shiva Kotagiri
According to our database1,
Shiva Kotagiri
authored at least 4 papers
between 2012 and 2014.
Collaborative distances:
Collaborative distances:
Timeline
2012
2013
2014
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2014
A 28 Gb/s 560 mW Multi-Standard SerDes With Single-Stage Analog Front-End and 14-Tap Decision Feedback Equalizer in 28 nm CMOS.
IEEE J. Solid State Circuits, 2014
2.1 28Gb/s 560mW multi-standard SerDes with single-stage analog front-end and 14-tap decision-feedback equalizer in 28nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Shift register multi-phase clock based downsampled floating tap DFE for serial links.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2012
A class of downsampled floating tap DFE architectures with application to serial links.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012