Shita Guo
Orcid: 0000-0002-7082-5791
According to our database1,
Shita Guo
authored at least 7 papers
between 2014 and 2020.
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Bibliography
2020
A 2.56-Gb/s Serial Wireline Transceiver That Supports an Auxiliary Channel in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2020
2019
A 76-81 GHz CMOS PA with 16-dBm PSAT and 30-dB Amplitude Control for MIMO Automotive Radars.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
2017
High-Efficiency E-Band Power Amplifiers and Transmitter Using Gate Capacitance Linearization in a 65-nm CMOS Process.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
2016
A 1-16 Gb/s All-Digital Clock and Data Recovery With a Wideband High-Linearity Phase Interpolator.
IEEE Trans. Very Large Scale Integr. Syst., 2016
2014
A low-power 28 Gb/s CDR using artificial lc transmission line technique in 65 nm CMOS.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
54 GHz CMOS LNAs with 3.6 dB NF and 28.2 dB gain using transformer feedback Gm-boosting technique.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014