Shirin Pourashraf

According to our database, Shirin Pourashraf authored at least 15 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Front-End Electronics for a 100 ps Coincidence Time Resolution TOF-PET Detector With 24-Fold LVDS Timing Channel Multiplexing.

Shirin Pourashraf, Joshua W. Cates, Derek Innes, Craig S. Levin

IEEE Trans. Instrum. Meas., 2024

2019

±0.25-V Class-AB CMOS Capacitance Multiplier and Precision Rectifiers.

Shirin Pourashraf, Jaime Ramírez-Angulo, Jose Maria Hinojo Montero, Ramón González Carvajal, Antonio J. López-Martín

IEEE Trans. Very Large Scale Integr. Syst., 2019

Gain and Bandwidth Enhanced Class-AB OTAs.

Shirin Pourashraf, Jaime Ramírez-Angulo, Alejandro Roman-Loera, Manaswini Gangineni

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

2018

A Highly Efficient Composite Class-AB-AB Miller Op-Amp With High Gain and Stable From 15 pF Up To Very Large Capacitive Loads.

Shirin Pourashraf, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal

IEEE Trans. Very Large Scale Integr. Syst., 2018

An Op-Amp Approach for Bandpass VGAs With Constant Bandwidth.

Shirin Pourashraf, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal, José María Algueta-Miguel

IEEE Trans. Circuits Syst. II Express Briefs, 2018

An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit.

Shirin Pourashraf, Jaime Ramírez-Angulo, Alfonso R. Cabrera-Galicia, Antonio J. López-Martín, Ramón González Carvajal

IEEE Trans. Circuits Syst. II Express Briefs, 2018

±0.18-V supply voltage gate-driven PGA with 0.7-Hz to 2-kHz constant bandwidth and 0.15-μW power dissipation.

Shirin Pourashraf, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón G. Carvajal, Alejandro Díaz-Sánchez

Int. J. Circuit Theory Appl., 2018

Ultra Low Voltage Gate Driven Bandpass PGA with Constant Bandwidth.

Shirin Pourashraf, Jaime Ramírez-Angulo, Alejandro Díaz-Sánchez

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Continuous and Discrete Time Low Voltage Analog Circuits in 16 nm CMOS Technology.

Shirin Pourashraf, Jaime Ramírez-Angulo, Alejandra Díaz-Armendariz

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

Super class AB OTA without open-loop gain degradation based on dynamic cascode biasing.

Shirin Pourashraf, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal

Int. J. Circuit Theory Appl., 2017

High current efficiency class-AB OTA with high open loop gain and enhanced bandwidth.

Shirin Pourashraf, Jaime Ramírez-Angulo, Alejandro Roman-Loera, Antonio J. López-Martín, Alejandro Díaz-Sánchez, Ramón González Carvajal

IEICE Electron. Express, 2017

A super class-AB OTA with high output current and no open loop gain degradation.

Shirin Pourashraf, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Offset compensation in a track and hold circuit.

Shirin Pourashraf, Jaime Ramírez-Angulo, Alfonso R. Cabrera-Galicia, Antonio J. López-Martín, Ramón González Carvajal

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2013

Implementation of a low power 16-bit radix-4 pipelined SRT divider using a modified Split-Path Data Driven Dynamic Logic (SPD³L) structure.

Shirin Pourashraf, Sayed Masoud Sayedi

Microelectron. J., 2013

2012

A low power D³L 16-bit radix- 4 pipelined SRT divider.

Shirin Pourashraf, Sayed Masoud Sayedi

Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012