Shinobu Asayama

According to our database, Shinobu Asayama authored at least 3 papers between 2011 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

40nm Ultra-low leakage SRAM at 170 deg.C operation for embedded flash MCU.

Yoshisato Yokoyama, Yuichiro Ishii, Hidemitsu Kojima, Atsushi Miyanishi, Yoshiki Tsujihashi, Shinobu Asayama, Kazutoshi Shiba, Koji Tanaka, Tatsuya Fukuda, Koji Nii, Kazumasa Yanagisawa

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

40 nm Dual-port and two-port SRAMs for automotive MCU applications under the wide temperature range of -40 to 170°C with test screening against write disturb issues.

Yoshisato Yokoyama, Yuichiro Ishii, Koji Tanaka, Tatsuya Fukuda, Yoshiki Tsujihashi, Atsushi Miyanishi, Shinobu Asayama, Keiichi Maekawa, Kazutoshi Shiba, Koji Nii

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2011

Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs.

Koichi Takeda, Toshio Saito, Shinobu Asayama, Yoshiharu Aimoto, Hiroyuki Kobatake, Shinya Ito, Toshifumi Takahashi, Masahiro Nomura, Kiyoshi Takeuchi, Yoshihiro Hayashi

IEEE J. Solid State Circuits, 2011