Shinji Satoh
According to our database1,
Shinji Satoh
authored at least 2 papers
between 1999 and 2000.
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Bibliography
2000
IEEE J. Solid State Circuits, 2000
1999
A negative V<sub>th</sub> cell architecture for highly scalable, excellently noise-immune, and highly reliable NAND flash memories.
IEEE J. Solid State Circuits, 1999