Shinji Komori
According to our database1,
Shinji Komori
authored at least 10 papers
between 1987 and 1997.
Collaborative distances:
Collaborative distances:
Timeline
1988
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1996
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
1997
IEEE J. Solid State Circuits, 1997
1996
A 1.6-GB/s data-rate 1-Gb synchronous DRAM with hierarchical square-shaped memory block and distributed bank architecture.
IEEE J. Solid State Circuits, 1996
A Built-In Self-Test Circuit with Timing Margin Test Function in a 1Gbit Synchronous DRAM.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996
1991
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991
1990
IEEE J. Solid State Circuits, February, 1990
1989
IEEE J. Solid State Circuits, October, 1989
IEEE J. Solid State Circuits, August, 1989
1988
IEEE J. Solid State Circuits, February, 1988
1987
Hardware Structure of a One-Chip Data Driven Processor: Q-p.
Proceedings of the International Conference on Parallel Processing, 1987