Shinichi Yasuda

According to our database, Shinichi Yasuda authored at least 13 papers between 2004 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

Physically Unclonable Function Using an Initial Waveform of Ring Oscillators.

Tetsufumi Tanamoto, Shinichi Yasuda, Satoshi Takaya, Shinobu Fujita

IEEE Trans. Circuits Syst. II Express Briefs, 2017

Physically unclonable function using initial waveform of ring oscillators on 65 nm CMOS technology.

Tetsufumi Tanamoto, Satoshi Takaya, Nobuaki Sakamoto, Hirotsugu Kasho, Shinichi Yasuda, Takao Marukame, Shinobu Fujita, Yuichiro Mitani

CoRR, 2017

2016

Physically Unclonable Function using Initial Waveform of Ring Oscillators.

Tetsufumi Tanamoto, Shinichi Yasuda, Satoshi Takaya, Shinobu Fujita

CoRR, 2016

2014

A pure-CMOS nonvolatile multi-context configuration memory for dynamically reconfigurable FPGAs.

Kosuke Tatsumura, Masato Oda, Shinichi Yasuda

Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

2012

Designing Nonvolatile Reconfigurable Switch-based FPGA through Overall Circuit Performance Evaluation.

Kazutaka Ikegami, Keiko Abe, Kumiko Nomura, Shinichi Yasuda, Masato Oda, Shinobu Fujita

Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2010

High-performance FPGA based on novel DSS-MOSFET and non-volatile configuration memory (abstract only).

Shinichi Yasuda, Tetsufumi Tanamoto, Kazutaka Ikegami, Atsuhiro Kinoshita, Keiko Abe, Hirotaka Nishino, Shinobu Fujita

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Detachable nano-carbon chip with ultra low power.

Shinobu Fujita, Shinichi Yasuda, Daesung Lee, Xiangyu Chen, Deji Akinwande, H.-S. Philip Wong

Proceedings of the 47th Design Automation Conference, 2010

2009

Perspectives and Issues in 3D-IC from Designers' Point of View.

Shinobu Fujita, Keiko Abe, Kumiko Nomura, Shinichi Yasuda, Tetsufumi Tanamoto

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

1200μm² Physical Random-Number Generators Based on SiN MOSFET for Secure Smart-Card Application.

Mari Matsumoto, Shinichi Yasuda, Ryuji Ohba, Kazutaka Ikegami, Tetsufumi Tanamoto, Shinobu Fujita

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007

Compact Fault Recovering Flip-Flop with Adjusting Clock Timing Triggered by Error Detection.

Shinichi Yasuda, Shinobu Fujita

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

Si Nanocrystal MOSFET with Silicon Nitride Tunnel Insulator for High-rate Random Number Generation.

Ryuji Ohba, Daisuke Matsushita, Koichi Muraoka, Shinichi Yasuda, Tetsufumi Tanamoto, Ken Uchida, Shinobu Fujita

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

2005

Physical random number generators for cryptographic application in mobile devices.

Shinichi Yasuda, Tetsufumi Tanamoto, Ryuji Ohba, Keiko Abe, Hanae Nozaki, Shinobu Fujita

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

Physical random number generator based on MOS structure after soft breakdown.

Shinichi Yasuda, Hideki Satake, Tetsufumi Tanamoto, Ryuji Ohba, Ken Uchida, Shinobu Fujita

IEEE J. Solid State Circuits, 2004