Shinichi Nishizawa

According to our database, Shinichi Nishizawa authored at least 41 papers between 2009 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

De-Correlation and De-Bias Post-Processing Circuits for True Random Number Generator.

Ruilin Zhang, Haochen Zhang, Xingyu Wang, Ziyang Ye, Kunyang Liu, Shinichi Nishizawa, Kiichi Niitsu, Hirofumi Shinohara

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024

Estimating of IGBT Bond Wire Lift-Off Trend Using Convolutional Neural Network (CNN).

Thatree Mamee, Zaiqi Lou, Katsuhiro Hata, Makoto Takamiya, Takayasu Sakurai, Shinichi Nishizawa, Wataru Saito

IEEE Access, 2024

2023

Area Efficient Approximate 4-2 Compressor and Probability-Based Error Adjustment for Approximate Multiplier.

Mingtao Zhang, Shinichi Nishizawa, Shinji Kimura

IEEE Trans. Circuits Syst. II Express Briefs, May, 2023

Libretto: An Open Cell Timing Characterizer for Open Source VLSI Design.

Shinichi Nishizawa, Toru Nakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., March, 2023

IGBT Power Module Design for Suppressing Gate Voltage Spike at Digital Gate Control.

Zaiqi Lou, Thatree Mamee, Katsuhiro Hata, Makoto Takamiya, Shinichi Nishizawa, Wataru Saito

IEEE Access, 2023

Evaluation of Application-Independent Unbiased Approximate Multipliers on Quantized Convolutional Neural Networks.

Mingtao Zhang, Ke Ma, Renrui Duan, Shinichi Nishizawa, Shinji Kimura

Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

An 8-point Approximate DCT Design with Optimized Signed Digit Encoding.

Zekun Wang, Shinichi Nishizawa, Shinji Kimura

Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Prime Factorization Based on Multiple Quantum Annealings on Partial Constraints with Analytical Variable Reduction.

Xinyi Guo, Geguang Miao, Shinichi Nishizawa, Shinji Kimura

Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

A Hardware-Efficient Approximate Multiplier Combining Inexact Same-weight N:2 Compressors and Remapping Logic with Error Recovery.

Renrui Duan, Mingtao Zhang, Yi Guo, Shinichi Nishizawa, Shinji Kimura

Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

2022

NCTUcell: A DDA- and Delay-Aware Cell Library Generator for FinFET Structure With Implicitly Adjustable Grid Map.

Yih-Lang Li, Shih-Ting Lin, Shinichi Nishizawa, Hong-Yan Su, Ming-Jie Fong, Oscar Chen, Hidetoshi Onodera

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Reduction of LSI Maximum Power Consumption with Standard Cell Library of Stack Structured Cells.

Yuki Imai, Shinichi Nishizawa, Kazuhito Ito

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022

Density Aware Cell Library Design for Design-Technology Co-Optimization.

Shinichi Nishizawa, Toru Nakura

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2021

Supplemental PDK for ASAP7 Using Synopsys Flow.

Shinichi Nishizawa, Shih-Ting Lin, Yih-Lang Li, Hidetoshi Onodera

IPSJ Trans. Syst. LSI Des. Methodol., 2021

2020

Universal NBTI Compact Model Replicating AC Stress/Recovery from a Single-shot Long-term DC Measurement.

Takumi Hosaka, Shinichi Nishizawa, Ryo Kishida, Takashi Matsumoto, Kazutoshi Kobayashi

IPSJ Trans. Syst. LSI Des. Methodol., 2020

MCell: Multi-Row Cell Layout Synthesis with Resource Constrained MAX-SAT Based Detailed Routing.

Yih-Lang Li, Shih-Ting Lin, Shinichi Nishizawa, Hidetoshi Onodera

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

Analog circuit design methodology utilizing a structure of thin BOX FDSOI.

Kota Chubachi, Shinichi Nishizawa, Kazuhito Ito

IEICE Electron. Express, 2019

Drive-Strength Selection for Synthesis of Leakage-Dominant Circuits.

A. K. M. Mahfuzul Islam, Shinichi Nishizawa, Yusuke Matsui, Yoshinobu Ichida

Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

Compact Modeling of NBTI Replicating AC Stress / Recovery from a Single-shot Long-term DC Measurement.

Takumi Hosaka, Shinichi Nishizawa, Ryo Kishida, Takashi Matsumoto, Kazutoshi Kobayashi

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

NCTUcell: A DDA-Aware Cell Library Generator for FinFET Structure with Implicitly Adjustable Grid Map.

Yih-Lang Li, Shih-Ting Lin, Shinichi Nishizawa, Hong-Yan Su, Ming-Jie Fong, Oscar Chen, Hidetoshi Onodera

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Switching of 3300V Scaled IGBT by 5V Gate Drive.

Toshiro Hiramoto, Katsumi Satoh, Tomoko Matsudai, Wataru Saito, Kuniyuki Kakushima, Takuya Hoshii, Kazuyoshi Furukawa, Masahiro Watanabe, Naoyuki Shigyo, Hitoshi Wakabayashi, Kazuo Tsutsui, Hiroshi Iwai, Atsushi Ogura, Shinichi Nishizawa, Ichiro Omura, Hiromichi Ohashi, Kazuo Itou, Toshihiro Takakura, Munetoshi Fukui, Shinichi Suzuki, Ken Takeuchi, Masanori Tsukuda, Yohichiroh Numasawa

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

DC-bias-voltage dependence of degradation of aluminum electrolytic capacitors.

Kazunori Hasegawa, Kousuke Tsuzaki, Shinichi Nishizawa

Microelectron. Reliab., 2018

ESR and capacitance monitoring of a dc-link capacitor used in a three-phase PWM inverter with a front-end diode rectifier.

Kazunori Hasegawa, Shinichi Nishizawa, Ichiro Omura

Microelectron. Reliab., 2018

Design Methodology for Variation Tolerant D-Flip-Flop Using Regression Analysis.

Shinichi Nishizawa, Hidetoshi Onodera

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

Minimization of Vote Operations for Soft Error Detection in DMR Design with Error Correction by Operation Re-Execution.

Kazuhito Ito, Yuto Ishihara, Shinichi Nishizawa

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

New Methodology for Evaluating Minority Carrier Lifetime for Process Assessment.

Kuniyuki Kakushima, Takuya Hoshii, M. Watanabe, N. Shizyo, K. Furukawa, Takuya Saraya, T. Takakura, K. Itou, M. Fukui, S. Suzuki, Ken Takeuchi, Iriya Muneta, Hitoshi Wakabayashi, Y. Numasawa, Atsushi Ogura, Shinichi Nishizawa, Kazuo Tsutsui, Toshiro Hiramoto, Hiromichi Ohashi, Hiroshi Iwai

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Process variation aware D-Flip-Flop design using regression analysis.

Shinichi Nishizawa, Hidetoshi Onodera

Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

Verification of the Injection Enhancement Effect in IGBTs by Measuring the Electron and Hole Currents Separately.

Takuya Hoshii, Kazuyoshi Furukawa, Kuniyuki Kakushima, Masahiro Watanabe, Naoyuki Shigvo, Takuya Saraya, Toshihiko Takakura, Kazuo Itou, Munetoshi Fukui, Shinichi Suzuki, Kiyoshi Takeuchi, Iriya Muneta, Hitoshi Wakabayashi, Shinichi Nishizawa, Kazuo Tsutsui, Toshiro Hiramoto, Hiromichi Ohashi, Hiroshi Lwai

Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017

Pin accessibility evaluating model for improving routability of VLSI designs.

Hong-Yan Su, Shinichi Nishizawa, Yan-Shiun Wu, Jun Shiomi, Yih-Lang Li, Hidetoshi Onodera

Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

3D scaling for insulated gate bipolar transistors (IGBTs) with low Vce(sat).

Kazuo Tsutsui, Kuniyuki Kakushima, Takuya Hoshii, A. Nakajima, Shinichi Nishizawa, Hitoshi Wakabayashi, Iriya Muneta, K. Sato, Tomoko Matsudai, Wataru Saito, Takuya Saraya, K. Itou, M. Fukui, S. Suzuki, Masaharu Kobayashi, T. Takakura, Toshiro Hiramoto, Atsushi Ogura, Y. Numasawa, Ichiro Omura, Hiromichi Ohashi, Hiroshi Iwai

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

Design and Analysis of a New Evaluation Circuit for Capacitors Used in a High-Power Three-Phase Inverter.

Kazunori Hasegawa, Ichiro Omura, Shinichi Nishizawa

IEEE Trans. Ind. Electron., 2016

Temperature rise measurement for power-loss comparison of an aluminum electrolytic capacitor between sinusoidal and square-wave current injections.

Kazunori Hasegawa, Kentaro Kozuma, Kousuke Tsuzaki, Ichiro Omura, Shinichi Nishizawa

Microelectron. Reliab., 2016

2015

Layout Generator with Flexible Grid Assignment for Area Efficient Standard Cell.

Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

IPSJ Trans. Syst. LSI Des. Methodol., 2015

An impact of process variation on supply voltage dependence of logic path delay variation.

Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

Proceedings of the VLSI Design, Automation and Test, 2015

2014

Design methodology of process variation tolerant D-Flip-Flops for low voltage circuit operation.

Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Variation-aware Flip-Flop energy optimization for ultra low voltage operation.

Tatsuya Kamakari, Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

2013

Standard Cell Structure with Flexible P/N Well Boundaries for Near-Threshold Voltage Operation.

Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

Analysis and comparison of XOR cell structures for low voltage circuit design.

Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

Proceedings of the International Symposium on Quality Electronic Design, 2013

2012

A Standard Cell Optimization Method for Near-Threshold Voltage Operations.

Masahiro Kondo, Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012

A flexible structure of standard cell and its optimization method for near-threshold voltage operation.

Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011

Modeling of Random Telegraph Noise under circuit operation - Simulation and measurement of RTN-induced delay fluctuation.

Kyosuke Ito, Takashi Matsumoto, Shinichi Nishizawa, Hiroki Sunagawa, Kazutoshi Kobayashi, Hidetoshi Onodera

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2009

An Efficient Hardware Accelerator for Power Grid Simulation.

Taiki Hashizume, Hisako Sugano, Shinichi Nishizawa, Masaya Yoshikawa, Masahiro Fukui

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009