Shingo Zaitsu
According to our database1,
Shingo Zaitsu
authored at least 3 papers
between 2012 and 2017.
Collaborative distances:
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Bibliography
2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2013
A 19 nm 112.8 mm<sup>2</sup> 64 Gb Multi-Level Flash Memory With 400 Mbit/sec/pin 1.8 V Toggle Mode Interface.
IEEE J. Solid State Circuits, 2013
2012
A 19nm 112.8mm<sup>2</sup> 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012