Shingo Yoshizawa

According to our database, Shingo Yoshizawa authored at least 70 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Foreword.

Shingo Yoshizawa, Hiroshi Tsutsui

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., March, 2023

Iterative Variable Threshold Method Resistant to Acoustic Reflections for Underwater Acoustic Positioning Systems.

Yuki Yamada, Shingo Yoshizawa, Takashi Saito, Hideki Sugimoto

Proceedings of the 22nd International Symposium on Communications and Information Technologies, 2023

2021

Simultaneous Multi-points Measurement in Underwater Acoustic Localization.

Atsushi Wada, Shingo Yoshizawa, Satoshi Yuasa, Hideki Sugimoto

Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2021

RAKE Reception of OFDM Signals in Non-Line-of-Sight Underwater Acoustic Communication.

Takahiro Ishikawa, Shingo Yoshizawa

Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2021

Automatic Discrimination of Sound Propagation Path Using CNN for Underwater Acoustic Communication.

Etou Hiromu, Shingo Yoshizawa

Proceedings of the 20th International Symposium on Communications and Information Technologies, 2021

2018

Parallel Resampling of OFDM Signals for Fluctuating Doppler Shifts in Underwater Acoustic Communication.

Shingo Yoshizawa, Takashi Saito, Yusaku Mabuchi, Tomoya Tsukui, Shin-ichi Sawada

J. Electr. Comput. Eng., 2018

2017

Data Selective Rake Reception for Underwater Acoustic Communication in Strong Multipath Interference.

Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito

J. Electr. Comput. Eng., 2017

Low Latency IDMA With Interleaved Domain Architecture for 5G Communications.

Tran Thi Thao Nguyen, Leonardo Lanante, Shingo Yoshizawa, Hiroshi Ochi

IEEE J. Emerg. Sel. Topics Circuits Syst., 2017

Interleaved Domain Interference Canceller for Low Latency IDMA System and Its VLSI Implementation.

Tran Thi Thao Nguyen, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Shingo Yoshizawa, Hiroshi Ochi

Proceedings of the 85th IEEE Vehicular Technology Conference, 2017

Comparator design for linearized statistical flash A-to-D converter.

Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa

Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

A simple current reference with low sensitivity to supply voltage and temperature.

Tatsuya Abe, Hiroshi Tanimoto, Shingo Yoshizawa

Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

Low latency Interleave Division Multiple Access System.

Tran Thi Thao Nguyen, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Shingo Yoshizawa, Hiroshi Ochi

Proceedings of the 2017 International Conference on Information Networking, 2017

2016

Power Reduction of Variable Wordlength OFDM Receiver in Time-Varying Fading Channels by Monitoring Subcarrier SNRs.

Shingo Yoshizawa, Daichi Sasaki, Hiroshi Tanimoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016

SC-FDE vs OFDM: Performance comparison in shallow-sea underwater acoustic communication.

Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito

Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2016

2015

VLSI Implementation of an Interference Canceller Using Dual-Frame Processing for OFDM-IDMA Systems.

Shingo Yoshizawa, Mai Nozaki, Hiroshi Tanimoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

Experimental evaluation of data selective rake reception for underwater acoustic communication.

Shun Akada, Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito

Proceedings of the 2015 International Symposium on Intelligent Signal Processing and Communication Systems, 2015

A low power OFDM receiver monitoring subcarrier SNRs in time-varying fading channels.

Shingo Yoshizawa, Hiroshi Tanimoto

Proceedings of the 15th International Symposium on Communications and Information Technologies, 2015

ASIP implementation of a low complexity iterative BD precoder for MU-MIMO system.

Yuji Yokota, Shingo Yoshizawa, Hiroshi Ochi

Proceedings of the 15th International Symposium on Communications and Information Technologies, 2015

FPGA implementation of stochastic flash A-to-D converter and its evaluation.

Hisato Takehata, Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa

Proceedings of the 15th International Symposium on Communications and Information Technologies, 2015

A stochastic flash A-to-D converter with dynamic element matching technique.

Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa

Proceedings of the 15th International Symposium on Communications and Information Technologies, 2015

Performance evaluation of antenna diversity with iterative decoding in OFDM-IDMA systems.

Akane Tajima, Shingo Yoshizawa, Hiroshi Tanimoto

Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

2014

Low-Power Dynamic MIMO Detection for a 4×4 MIMO-OFDM Receiver.

Nozomi Miyazaki, Shingo Yoshizawa, Yoshikazu Miyanaga

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

Evaluation of diversity combining methods for underwater acoustic OFDM communication.

Ryuta Ishimoto, Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito

Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2014

VLSI design of an interference canceller for QPSK OFDM-IDMA systems.

Mai Nozaki, Shingo Yoshizawa, Hiroshi Tanimoto

Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013

A High-Speed and Low-Energy-Consumption Processor for SVD-MIMO-OFDM Systems.

Hiroki Iwaizumi, Shingo Yoshizawa, Yoshikazu Miyanaga

VLSI Design, 2013

Evaluation of Cover and Reflector in Receiver Antennas for SM-MIMO Wireless Communications.

Shingo Yoshizawa, Yoshikazu Miyanaga

J. Electr. Comput. Eng., 2013

A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.

Kosuke Shimazaki, Shingo Yoshizawa, Yasuyuki Hatakawa, Tomoko Matsumoto, Satoshi Konishi, Yoshikazu Miyanaga

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

Effects of Channel Features on Parameters of Genetic Algorithm for MIMO Detection.

Kazi Obaidullah, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

A Robust Speech Communication into Smart Info-Media System.

Yoshikazu Miyanaga, Wataru Takahashi, Shingo Yoshizawa

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

Effectiveness of cover and reflector in receiver antennas for MIMO line-of-sight channels.

Shingo Yoshizawa, Masahiro Sugitani, Yoshikazu Miyanaga

Proceedings of the 24th IEEE Annual International Symposium on Personal, 2013

Hardware implementation of an interference canceller for IDMA wireless communications.

Shingo Yoshizawa, Yasuyuki Hatakawa, Tomoko Matsumoto, Satoshi Konishi, Yoshikazu Miyanaga

Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2013

A VLSI design of an arrayed pipelined Tomlinson-Harashima precoder for MU-MIMO systems.

Kosuke Shimazaki, Shingo Yoshizawa, Yasuyuki Hatakawa, Tomoko Matsumoto, Satoshi Konishi, Yoshikazu Miyanaga

Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2013

2012

Variable wordlength soft-decision Viterbi decoder for power-efficient wireless LAN.

Jaeseong Kim, Shingo Yoshizawa, Yoshikazu Miyanaga

Integr., 2012

Design of Area- and Power-Efficient Pipeline FFT Processors for 8x8 MIMO-OFDM Systems.

Shingo Yoshizawa, Yoshikazu Miyanaga

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012

A Dynamically Reconfigurable FPGA-Based Pattern Matching Hardware for Subclasses of Regular Expressions.

Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga

IEICE Trans. Inf. Syst., 2012

A new high-speed and low-power LSI design of SVD-MIMO-OFDM systems.

Hiroki Iwaizumi, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Communications and Information Technologies, 2012

Realistic Rician fading channel based optimal linear MIMO precoding evaluation.

Xiaonan Nicole Shi, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the 5th International Symposium on Communications, 2012

A low-power MMSE MIMO detector using dynamic voltage wordlength scaling for 4×4 MIMO-OFDM systems.

Jaeseong Kim, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

VLSI Implementation of a Scalable Pipeline MMSE MIMO Detector for a 4×4 MIMO-OFDM Receiver.

Shingo Yoshizawa, Hirokazu Ikeuchi, Yoshikazu Miyanaga

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

Development and Outdoor Evaluation of an Experimental Platform in an 80-MHz Bandwidth 2×2 MIMO-OFDM System in 5.2-GHz Band.

Hisayoshi Kano, Shingo Yoshizawa, Takashi Gunji, Shougo Okamoto, Morio Tawarayama, Yoshikazu Miyanaga

IEICE Trans. Inf. Syst., 2011

Development of wireless video transmission equipment by cooperating hardware and software in wideband MIMO-OFDM system.

Jun Takizawa, Takaya Kaji, Shingo Yoshizawa, Takashi Gunji, Morio Tawarayama, Yoshikazu Miyanaga

Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2011

Fading effects on parameter selection in genetic algorithm for MIMO detection.

Kazi Obaidullah, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2011

Development of an ASIP-based singular value decomposition processor in SVD-MIMO systems.

Takaya Kaji, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2011

LSI development of 8×8 single-user MIMO-OFDM for IEEE 802.11ac WLANs.

Shingo Yoshizawa, Daisuke Nakagawa, Nozomi Miyazaki, Takaya Kaji, Yoshikazu Miyanaga

Proceedings of the 11th International Symposium on Communications and Information Technologies, 2011

MIMO precoding performance for correlated and estimated Rician fading.

Xiaonan Nicole Shi, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the 11th International Symposium on Communications and Information Technologies, 2011

Evaluation of genetic algorithm-based detection for correlated MIMO fading channels.

Kazi Obaidullah, Constantin Siriteanu, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the 11th International Symposium on Communications and Information Technologies, 2011

An area and power efficient pipeline FFT processor for 8×8 MIMO-OFDM systems.

Shingo Yoshizawa, Atsushi Orikasa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Development and outdoor evaluation of an experimental platform in an 80-MHz bandwidth 2×2 MIMO-OFDM system at 5.2-GHz band.

Shingo Yoshizawa, Shinya Odagiri, Yasuhiro Asai, Takashi Gunji, Takashi Saito, Yoshikazu Miyanaga

Proceedings of the IEEE 21st International Symposium on Personal, 2010

Scalable pipeline architecture of MMSE MIMO detector for 4×4 MIMO-OFDM receiver.

Shingo Yoshizawa, Hirokazu Ikeuchi, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Dynamic reconfigurable bit-parallel architecture for large-scale regular expression matching.

Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga

Proceedings of the International Conference on Field-Programmable Technology, 2010

Dynamic wordlength calibration to reduce power dissipation in wireless OFDM systems.

Jaeseong Kim, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009

New PAPR Reduction in an OFDM System Using Hybrid of PTS-CAPPR Methods with GA Coded Side Information Technique.

Chusit Pradabpet, Shingo Yoshizawa, Yoshikazu Miyanaga, Kobchai Dejhan

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

VLSI Implementation of a 4×4 MIMO-OFDM transceiver with an 80-MHz Channel Bandwidth.

Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Use of a Variable Wordlength Technique in an OFDM Receiver to Reduce Energy Dissipation.

Shingo Yoshizawa, Yoshikazu Miyanaga

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

VLSI Implementation of a Complete Pipeline MMSE Detector for a 4 x 4 MIMO-OFDM Receiver.

Shingo Yoshizawa, Yasushi Yamauchi, Yoshikazu Miyanaga

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

New PAPR Reduction in OFDM System Using Hybrid of PTS-APPR Methods with Coded Side Information Technique.

Chusit Pradabpet, Shingo Yoshizawa, Yoshikazu Miyanaga, Kobchai Dejhan

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

A complete pipelined MMSE detection architecture in a 4x4 MIMO-OFDM receiver.

Shingo Yoshizawa, Yasushi Yamauchi, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Reconfigurable two-dimensional pipeline FFT processor in OFDM cognitive radio systems.

Shingo Yoshizawa, Kazuto Nishi, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

Dynamic Reconfigurable Architecture for a Low-Power Despreader in VSF-OFCDM Systems.

Takayuki Sugawara, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Scalable architecture for word HMM-based speech recognition and VLSI implementation in complete system.

Shingo Yoshizawa, Naoya Wada, Noboru Hayasaka, Yoshikazu Miyanaga

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Tunable Wordlength Architecture for a Low Power Wireless OFDM Demodulator.

Shingo Yoshizawa, Yoshikazu Miyanaga

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

300-Mbps OFDM baseband transceiver for wireless LAN systems.

Shingo Yoshizawa, Yoshikazu Miyanaga, Hiroshi Ochi, Yoshio Itoh, Nobuo Hataoka, Baiko Sai, Norihisa Takayama, Masaki Hirata

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Tunable word length architecture for low power wireless OFDM demodulator.

Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Direct control on modulation spectrum for noise-robust speech recognition and spectral subtraction.

Naoya Wada, Noboru Hayasaka, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

VLSI Implementation of a 600-Mbps MIMO-OFDM Wireless Communication System.

Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

VLSI Architecture for Robust Speech Recognition Systems and its Implementation on a Verification Platform.

Shingo Yoshizawa, Noboru Hayasaka, Naoya Wada, Yoshikazu Miyanaga

J. Robotics Mechatronics, 2005

Robust VLSI architecture for system-on-chip design and its implementation in Viterbi decoder.

Yasuyuki Hatakawa, Shingo Yoshizawa, Yoshikazu Miyanaga

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

Cepstral Amplitude Range Normalization for Noise Robust Speech Recognition.

Shingo Yoshizawa, Noboru Hayasaka, Naoya Wada, Yoshikazu Miyanaga

IEICE Trans. Inf. Syst., 2004

Scalable architecture for word HMM-based speech recognition.

Shingo Yoshizawa, Naoya Wada, Noboru Hayasaka, Yoshikazu Miyanaga

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Cepstral gain normalization for noise robust speech recognition.

Shingo Yoshizawa, Noboru Hayasaka, Naoya Wada, Yoshikazu Miyanaga

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004