Shin'ichi Miura

Orcid: 0000-0003-2009-2996

According to our database1, Shin'ichi Miura authored at least 20 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Introducing Open OnDemand to Supercomputer Fugaku.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

2021
An Operational Data Collecting and Monitoring Platform for Fugaku: System Overviews and Case Studies in the Prelaunch Service Period.
Proceedings of the High Performance Computing - ISC High Performance Digital 2021 International Workshops, Frankfurt am Main, Germany, June 24, 2021

2019
HyperX topology: first at-scale implementation and comparison to the fat-tree.
Proceedings of the International Conference for High Performance Computing, 2019

The First Supercomputer with HyperX Topology: A Viable Alternative to Fat-Trees?
Proceedings of the 2019 IEEE Symposium on High-Performance Interconnects, 2019

2011
Peach: A Multicore Communication System on Chip with PCI Express.
IEEE Micro, 2011

An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

PEARL and PEACH: A Novel PCI Express Direct Link and Its Implementation.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

XMCAPI: Inter-core Communication Interface on Multi-chip Embedded Systems.
Proceedings of the IEEE/IFIP 9th International Conference on Embedded and Ubiquitous Computing, 2011

An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller.
Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011

2010
Customizing Virtual Machine with Fault Injector by Integrating with SpecC Device Model for a Software Testing Environment D-Cloud.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

P-Bus: Programming Interface Layer for Safe OS Kernel Extensions.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

PEARL: Power-Aware, Dependable, and High-Performance Communication Link Using PCI Express.
Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications, 2010

2009
Towards an Open Dependable Operating System.
Proceedings of the 2009 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2009

RI2N/DRV: Multi-link ethernet for high-bandwidth and fault-tolerant network on PC clusters.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Flexible Multi-link Ethernet Binding System for PC Clusters with Asymmetric Topology.
Proceedings of the 15th IEEE International Conference on Parallel and Distributed Systems, 2009

2008
A dynamic routing control system for high-performance PC cluster with multi-path Ethernet connection.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

RI2N: High-bandwidth and fault-tolerant network with multi-link Ethernet for PC clusters.
Proceedings of the 2008 IEEE International Conference on Cluster Computing, 29 September, 2008

2007
RI2N/UDP: High bandwidth and fault-tolerant network for a PC-cluster based on multi-link Ethernet.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2005
Low-cost High-bandwidth Tree Network for PC Clusters based on Tagged-VLAN Technology.
Proceedings of the 8th International Symposium on Parallel Architectures, 2005

2003
RI2N - Interconnection Network System for Clusters with Wide-Bandwidth and Fault-Tolerancy Based on Multiple Links.
Proceedings of the High Performance Computing, 5th International Symposium, 2003


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