Shin'ichi Kobayashi

According to our database1, Shin'ichi Kobayashi authored at least 5 papers between 1992 and 2006.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

1992
1994
1996
1998
2000
2002
2004
2006
0
1
2
1
1
1
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2006
A Methodology for Planning R&D Topics in IT Field.
Proceedings of the 39th Hawaii International International Conference on Systems Science (HICSS-39 2006), 2006

2005
Technology Trends Analysis from the Internet Resources.
Proceedings of the Advances in Knowledge Discovery and Data Mining, 2005

1998
A Functional Model of Cortico-Basal Ganglia Loop in Motor Control.
Proceedings of the Fifth International Conference on Neural Information Processing, 1998

1994
Memory array architecture and decoding scheme for 3 V only sector erasable DINOR flash memory.
IEEE J. Solid State Circuits, April, 1994

1992
A new erasing and row decoding scheme for low supply voltage operation 16-Mb/64-Mb flash memories.
IEEE J. Solid State Circuits, April, 1992


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