Shin-Dug Kim

Jun Wang

Yawei Zhao

Proceedings of the 2008 IEEE International Conference on e-Business Engineering, 2008

A Multi-Block Interleaving Structure for NAND Flash Memory Storage.

[BibT_eX]

Proceedings of the 2008 International Conference on Computer Design, 2008

2007

Cooperative Cache System: A Low Power Cache System for Embedded Processors.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2007

An Efficient Method to Create Business Level Events Using Complex Event Processing Based on RFID Standards.

[BibT_eX]

[DOI]

Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2007

An Embedded Software Architecture for Advancing Modifiability in Digital Convergence Environment.

[BibT_eX]

Ho-sung Han

Proceedings of the 2007 International Conference on Software Engineering Research & Practice, 2007

An Efficient Management Algorithm for Gateway Readers in the Warehouse.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Multimedia and Ubiquitous Engineering (MUE 2007), 2007

3D Caricature Generation System on the Mobile Handset Using a Single Photograph.

[BibT_eX]

[DOI]

Yeong-Kyu Lim

Alexander Fedorov

Proceedings of the 2007 International Conference on Parallel Processing Workshops (ICPP Workshops 2007), 2007

Reduced Uneven Multi-hexagon-grid Search for Fast Integer Pel Motion Estimation in H.264/AVC.

[BibT_eX]

[DOI]

In-Jik Lee

Proceedings of the Image Analysis and Recognition, 4th International Conference, 2007

A Hierarchical Occlusion Culling Method Reducing Query Delay.

[BibT_eX]

Proceedings of the 2007 International Conference on Computer Graphics & Virtual Reality, 2007

An efficient scheme for parallelizing fast search algorithm on SIMD architecture in H.264/AVC.

[BibT_eX]

Proceedings of the ISCA 20th International Conference on Parallel and Distributed Computing Systems, 2007

Real-time data processing based on caching algorithm in ubiquitous information middleware.

[BibT_eX]

Proceedings of the ISCA 20th International Conference on Parallel and Distributed Computing Systems, 2007

2006

An Effective Visibility Culling Method Based on Cache Block.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

A deterministic way-prediction scheme using power-aware replacement policy.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2006

Providing multilayered context for building smart home.

[BibT_eX]

[DOI]

J. Comput. Methods Sci. Eng., 2006

A Service Conflict Resolution Algorithm Based on Virtual Personal World.

[BibT_eX]

[DOI]

Proceedings of the Ubiquitous Computing Systems, Third International Symposium, 2006

VPW: An Effective Personal Space Model for Providing Ubiquitous.

[BibT_eX]

[DOI]

Proceedings of the Fourth International Conference on Software Engineering, 2006

Web Service Resource Framework Based Computing Service Framework for Computational Grid Applications.

[BibT_eX]

[DOI]

Proceedings of the Frontiers of High Performance Computing and Networking, 2006

Practice and Experience of an Embedded Processor Core Modeling.

[BibT_eX]

[DOI]

Proceedings of the High Performance Computing and Communications, 2006

A Context-aware Handoff Management for Seamless Connectivity in Ubiquitous Computing Environment.

[BibT_eX]

Proceedings of the 2006 International Conference on Pervasive Systems & Computing, 2006

A Seamless Service Management with Context-Aware Handoff Scheme in Ubiquitous Computing Environment.

[BibT_eX]

[DOI]

Proceedings of the Management of Convergence Networks and Services, 2006

A Profile Based Vertical Handoff Scheme for Ubiquitous Computing Environment.

[BibT_eX]

[DOI]

Chung-Pyo Hong

Tae-Hoon Kang

Proceedings of the Management of Convergence Networks and Services, 2006

Low-Power Data Cache Architecture by Address Range Reconfiguration for Multimedia Applications.

[BibT_eX]

[DOI]

Hoon-Mo Yang

Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006

2005

A new NAND-type flash memory package with smart buffer system for spatial and temporal localities.

[BibT_eX]

[DOI]

J. Syst. Archit., 2005

A Post-Textured Architecture For Effective Occlusion Culling.

[BibT_eX]

Moon-Hee Choi

Proceedings of The 2005 International Conference on Computer Vision, 2005

Sensor Abstraction and Context Delivery Model based on Web Services for Context-Aware Computing.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2005

A Personalized and Scalable Service Broker for the Global Computing Environment.

[BibT_eX]

[DOI]

Proceedings of the Parallel and Distributed Processing and Applications, 2005

Reconfigurable Microarchitecture Based System-Level Dynamic Power Management SoC Platform.

[BibT_eX]

[DOI]

Proceedings of the Embedded Software and Systems, Second International Conference, 2005

2-D Discrete Cosine Transform (DCT) on Meshes with Hierarchical Control Modes.

[BibT_eX]

[DOI]

Su-Jin Lee

Proceedings of the Pattern Recognition and Image Analysis, Second Iberian Conference, 2005

A Programmable Context Interface to Build a Context Infrastructure for Worldwide Smart Applications.

[BibT_eX]

[DOI]

Proceedings of the Embedded and Ubiquitous Computing, 2005

A Hardware Architecture for Intra-Prediction of H.264/AVC.

[BibT_eX]

Proceedings of The 2005 International Conference on Embedded Systems and Applications, 2005

A Pipelined Hardware Architecture for Motion Estimation of H.264/AVC.

[BibT_eX]

[DOI]

Su-Jin Lee

Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004

Dynamic and selective low power data TLB system.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2004

An Acceleration Processor for Data Intensive Scientific Computing.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2004

An energy efficient cache memory architecture for embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), 2004

An Efficient Stochastic Anti-Collision Algorithm Using Bit-Slot Mechanism.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2004

A Space-Efficient On-Chip Compressed Cache Organization for High Performance Computing.

[BibT_eX]

[DOI]

Proceedings of the Parallel and Distributed Processing and Applications, 2004

A Smart Agent-Based Grid Computing Platform.

[BibT_eX]

[DOI]

Proceedings of the Computational Science and Its Applications, 2004

Power-Aware Deterministic Block Allocation for Low-Power Way-Selective Cache Structure.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

Design of a Service-Oriented Middleware for Making the Global RFID System.

[BibT_eX]

Proceedings of the International Conference on Internet Computing, 2004

A Slope-Based Search Technique for Block Motion Estimation.

[BibT_eX]

Myoung-Seo Kim

Proceedings of the International Conference on Imaging Science, Systems and Technology, 2004

A profile-based middleware architecture for ubiquitous computing environments.

[BibT_eX]

Proceedings of the IASTED International Conference on Communications, Internet, and Information Technology, November 22, 2004

2003

An Intelligent Cache System with Hardware Prefetching for High Performance.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2003

Dynamic Topology Selection for High Performance MPI in the Grid Environments.

[BibT_eX]

[DOI]

Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface,10th European PVM/MPI Users' Group Meeting, Venice, Italy, September 29, 2003

A Logical Cluster-Based Grid Computing Platform.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

Application Specific Adaptive Double Buffer Managed On Chip SIMD Co-Processor Architecture.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

An Adaptive Multi-Module Cache with Hardware Prefetching Mechanism for Multimedia Applications.

[BibT_eX]

[DOI]

Proceedings of the 11th Euromicro Workshop on Parallel, 2003

A selective filter-bank TLB system.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

An Efficient Collective Communication Method for Grid Scale Networks.

[BibT_eX]

[DOI]

Proceedings of the Computational Science - ICCS 2003, 2003

Improving the Performance of Grid-Enabled MPI by Intelligent Message Compression.

[BibT_eX]

Proceedings of the International Conference on Internet Computing, 2003

Appliaction-Specific Data Cache Systems.

[BibT_eX]

Proceedings of the ISCA 18th International Conference Computers and Their Applications, 2003

An Effective Framework for Constructing PC-based Grid Computing Platform.

[BibT_eX]

Proceedings of the ISCA 16th International Conference on Parallel and Distributed Computing Systems, 2003

2002

Application-adaptive intelligent cache memory system.

[BibT_eX]

[DOI]

Charles C. Weems

ACM Trans. Embed. Comput. Syst., 2002

Performance analysis of a selectively compressed memory system.

[BibT_eX]

[DOI]

Charles C. Weems

Microprocess. Microsystems, 2002

A banked-promotion translation lookaside buffer system.

[BibT_eX]

[DOI]

J. Syst. Archit., 2002

A Low Power TLB Structure for Embedded Systems.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2002

An Advanced Filtering TLB for Low Power Consumption.

[BibT_eX]

[DOI]

Proceedings of the 14th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2002), 2002

Agent Based Resource Management for Grid Computing.

[BibT_eX]

Youn-Joo Lee

Kyung-Lang Park

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

Design of a Single Pass Rendering Pipeline for Occlusion Culling.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

A Performance and Power Efficient Instruction Cache for VLIW.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

A Pipelined Tiling-Traversal Unit for High Performance 3D Rendering Processor.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

A Hierarchical Multiple SIMD Architecture for Artificial Neural Networks.

[BibT_eX]

Kwang-Sook Kim

Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002

2001

A Banked-Promotion TLB for High Performance and Low Power.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

2000

Real-time Java virtual machine for information appliances.

[BibT_eX]

[DOI]

IEEE Trans. Consumer Electron., 2000

An Effective Configuration Method for Java-Internet Computing Environment.

[BibT_eX]

[DOI]

Pil-Sup Shin

Parallel Process. Lett., 2000

A new cache architecture based on temporal and spatial locality.

[BibT_eX]

[DOI]

J. Syst. Archit., 2000

An on-chip cache compression technique to reduce decompression overhead and design complexity.

[BibT_eX]

[DOI]

J. Syst. Archit., 2000

Impact of the memory interface structure in the memory-processor integrated architecture for computer vision.

[BibT_eX]

[DOI]

Young-Sik Kim

Tack-Don Han

J. Syst. Archit., 2000

A section cache system designed for VLIW architectures.

[BibT_eX]

[DOI]

J. Syst. Archit., 2000

An Internet Computing Platform based on Multiple Agent Systems.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

A Dual Data Cache System to Reflect the Principle of Locality Effectively.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Designing a Real-time Java Virtual Machine on Embedded Systems for Web Computing.

[BibT_eX]

Young-Min Lee

Byung-Chul Tak

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

A Power Efficient Cache Structure for Embedded Processors Based on the Dual Cache Structure.

[BibT_eX]

[DOI]

Proceedings of the Languages, 2000

A Selective Temporal and Aggressive Spatial Cache System Based on Time Interval.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Configuration Method of Multiple Clusters for the Computational Grid.

[BibT_eX]

[DOI]

Proceedings of the Grid Computing, 2000

Resource Management Method for Cooperative Web Computing on Computational Grid.

[BibT_eX]

[DOI]

Hye-Seon Maeng

Tack-Don Han

Proceedings of the Grid Computing, 2000

1999

A floating point multiplier performing IEEE rounding and addition in parallel.

[BibT_eX]

[DOI]

J. Syst. Archit., 1999

Cooperative Web Computing Environment with a Multi-Managing Method.

[BibT_eX]

Hye-Seon Maeng

Tack-Don Han

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

A Java Internet Computing Platform via Communication Libraries.

[BibT_eX]

Pil-Sup Shin

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

A Java Internet Computing Environment with Effective Configuration Method.

[BibT_eX]

[DOI]

Pil-Sup Shin

Proceedings of the 1999 International Symposium on Parallel Architectures, 1999

Design and Evaluation of a Selective Compressed Memory System.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference On Computer Design, 1999

A Selective Compressed Memory System by On-Line Data Decompressing.

[BibT_eX]

[DOI]

Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998

Mapping of neural networks onto the memory-processor integrated architecture.

[BibT_eX]

[DOI]

Neural Networks, 1998

Methods to improve performance of instruction prefetching through balanced improvement of two primary performance factors.

[BibT_eX]

[DOI]

J. Syst. Archit., 1998

An Adaptive Parallel Computer Vision System.

[BibT_eX]

[DOI]

Int. J. Pattern Recognit. Artif. Intell., 1998

Design and Performance Evaluation of an Adaptive Cache Coherence Protocol.

[BibT_eX]

[DOI]

Nam-Hee Kim

Proceedings of the International Conference on Parallel and Distributed Systems, 1998

A Dualthreaded Java Processor for Java Multithreading.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Parallel and Distributed Systems, 1998

1997

Multiprocessor Scheduling with Genetic Algorithms in a Heterogeneous Environment.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1997

An Effective Memory-Processor Integrated Architecture for Computer Vision.

[BibT_eX]

[DOI]

Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997

Memory based processor array for artificial neural networks.

[BibT_eX]

[DOI]

Proceedings of International Conference on Neural Networks (ICNN'97), 1997

1994

Multiple Quadratic Forms: A Case Study in the Design of Data.Parallel Algorithms.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 1994

1993

Multiple Quadratic Forms: A Case Study in the Design of Scalable Algorithms.

[BibT_eX]

[DOI]

Proceedings of the 1993 International Conference on Parallel Processing, 1993

1991

Modeling Overlapped Operation between the Control Unit and Processing Elements in an SIMD Machine.

[BibT_eX]

[DOI]

Mark A. Nichols

Howard Jay Siegel

J. Parallel Distributed Comput., 1991

Limitations Imposed on Mixed-Mode Performance of Optimized Phases Due to Temporal Juxtaposition.

[BibT_eX]

[DOI]

Thomas B. Berg

Howard Jay Siegel

J. Parallel Distributed Comput., 1991

Impact of Temporal Juxtaposition on the Isolated Phase Optimization Approach to Mapping an Algorithm to Mixed-Mode Architectures.

[BibT_eX]

Thomas B. Berg