Shiladitya Ghosh
According to our database1,
Shiladitya Ghosh
authored at least 2 papers
between 2017 and 2019.
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Bibliography
2019
Input Elimination Transformations for Scalable Verification and Trace Reconstruction.
Proceedings of the 2019 Formal Methods in Computer Aided Design, 2019
2017
Formal Methods for Validation and Test Point Prioritization in Railway Signaling Logic.
IEEE Trans. Intell. Transp. Syst., 2017