Shiju Lin

Orcid: 0000-0002-6556-7038

According to our database1, Shiju Lin authored at least 10 papers between 2021 and 2024.

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Bibliography

2024
Xplace: An Extremely Fast and Extensible Placement Framework.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2024

An Open-Source Fast Parallel Routing Approach for Commercial FPGAs.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

Size-Optimized Depth-Constrained Large Parallel Prefix Circuits.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

GCS-Timer: GPU-Accelerated Current Source Model Based Static Timing Analysis.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Ink: Efficient Incremental k-Critical Path Generation.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
GAMER: GPU-Accelerated Maze Routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

2022
Superfast Full-Scale CPU-Accelerated Global Routing.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Partition and place finite element model on wafer-scale engine.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

NovelRewrite: node-level parallel AIG rewriting.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
GAMER: GPU Accelerated Maze Routing.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021


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