Shih-Hsu Huang
Orcid: 0000-0001-8908-8384
According to our database1,
Shih-Hsu Huang
authored at least 113 papers
between 1995 and 2024.
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Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
An Overview of Trustworthy AI: Advances in IP Protection, Privacy-Preserving Federated Learning, Security Verification, and GAI Safety Alignment.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2024
Guest Editorial: Toward Trustworthy AI: Advances in Circuits, Systems, and Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2024
Design Flow for Incorporating Camouflaged Logic Gates to Enhance Hardware Security While Considering Timing Closure.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Securing Finite State Machines through Obfuscation Modes and Diverse Flip-Flop Configurations.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2024
Automatic Tool for Translating Sum-of-Product Expressions into Behavior-Level CIM Circuits.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2024
Special Session: Enhancing Reliability in Digital Computing-in-Memory Architectures Through Approximation and Fault Tolerance Methods.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024
2023
Proceedings of the IEEE International Test Conference in Asia, 2023
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023
An Automatic Facial Analysis System for The Detection of Pediatric Obstructive Sleep Apnea.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023
2022
Proceedings of the 19th International SoC Design Conference, 2022
Proceedings of the 19th International SoC Design Conference, 2022
A Reinforcement Learning Methodology for The Search of SRAM CIM-based Accelerator Configuration.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022
A Behavior-Level Simulation Framework for RRAM-Based Deep Learning Accelerators with Flexible Architecture Configurations.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
Sensors, 2021
Sensors, 2021
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2021
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the IEEE International Conference on Consumer Electronics, 2021
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021
2020
A High-Performance Multiply-Accumulate Unit by Integrating Additions and Accumulations Into Partial Product Reduction Process.
IEEE Access, 2020
Co-Optimization of Grid-Based TAM Wire Routing and Test Scheduling with Reconfigurable Wrappers.
Proceedings of the 38th IEEE VLSI Test Symposium, 2020
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020
2019
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
2018
Proceedings of the 2018 International Symposium on VLSI Design, 2018
Proceedings of the 11th International Workshop on Network on Chip Architectures, 2018
Proceedings of the International SoC Design Conference, 2018
Integration of Retention-aware Refresh and BISR Techniques for DRAM Refresh Power Reduction.
Proceedings of the International SoC Design Conference, 2018
2017
Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
3D IC Memory BIST Controller Allocation for Test Time Minimization Under Power Constraints.
Proceedings of the 26th IEEE Asian Test Symposium, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEICE Electron. Express, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
2015
ACM Trans. Design Autom. Electr. Syst., 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
2014
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
Abstract bus interface unit for ESL design from TLM 2.0 communications to the real bus protocol.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
Self-adjusting mechanism to dynamically suppress the effect of PVT variations on clock skew.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2013
ACM Trans. Design Autom. Electr. Syst., 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
J. Inf. Sci. Eng., 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Clock period minimization with minimum area overhead in high-level synthesis of nonzero clock skew circuits.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Simultaneous wafer bonding type selection and layer assignment for TSV count minimization.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Proceedings of the 2011 IEEE International Conference on Microelectronic Systems Education, 2011
2010
Resource Selection and Binding of Nonzero Clock Skew Circuits for Standby Leakage Current Minimization.
J. Inf. Sci. Eng., 2010
Critical-PMOS-aware clock tree design methodology for anti-aging zero skew clock gating.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
ACM Trans. Design Autom. Electr. Syst., 2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Simultaneous Clock Skew Scheduling and Power-Gated Module Selection for Standby Leakage Minimization.
J. Inf. Sci. Eng., 2009
IEICE Electron. Express, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
An ILP Approach to the Simultaneous Application of Operation Scheduling and Power Management.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
Proceedings of the 45th Design Automation Conference, 2008
2007
ACM Trans. Design Autom. Electr. Syst., 2007
A Fast Register Scheduling Approach to the Architecture of Multiple Clocking Domains.
J. Inf. Sci. Eng., 2007
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007
IEICE Electron. Express, 2007
Simultaneous Operation Scheduling and Operation Delay Selection to Minimize Cycle-by-Cycle Power Differential.
Proceedings of the Emerging Directions in Embedded and Ubiquitous Computing, 2007
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006
Proceedings of the 2006 Joint Conference on Information Sciences, 2006
An ILP Approach to the Simultaneous Application of Operation Scheduling and Power Management.
Proceedings of the 2006 Joint Conference on Information Sciences, 2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
J. Inf. Sci. Eng., 2005
A High Speed Fuzzy Inference Processor with Dynamic Analysis and Scheduling Capabilities.
IEICE Trans. Inf. Syst., 2005
IEICE Electron. Express, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 42nd Design Automation Conference, 2005
2004
IEICE Trans. Inf. Syst., 2004
2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
2002
An effective floorplan-based power distribution network design methodology under reliability constraints.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002
2001
Proceedings of the Third IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2001), March 31, 2001
Proceedings of the 10th IEEE International Conference on Fuzzy Systems, 2001
2000
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000
1995
A new scheduling algorithm for synthesizing the control blocks of control-dominated circuits.
Microprocess. Microprogramming, 1995
Microprocess. Microprogramming, 1995
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995