Shigeto Maegawa

According to our database, Shigeto Maegawa authored at least 7 papers between 1997 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Past and Future Technology for Mixed Signal LSI.

Kenichi Hatasako, Tetsuya Nitta, Masami Hane, Shigeto Maegawa

IEICE Trans. Electron., 2014

2007

A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI.

Fukashi Morishita, Hideyuki Noda, Isamu Hayashi, Takayuki Gyohten, Mako Okamoto, Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto

IEICE Trans. Electron., 2007

Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation.

Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi, Shigeto Maegawa

IEICE Trans. Electron., 2007

2006

High Performance CMOS Circuit by Using Charge Recycling Active Body-Bias Controlled SOI.

Masayuki Kitamura, Masaaki Iijima, Kenji Hamada, Masahiro Numa, Hiromi Notani, Akira Tada, Shigeto Maegawa

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

An SOI-Based 7.5µm-Thick 0.15x0.15mm2 RFID Chip.

Mitsuo Usami, Akira Sato, Hisao Tanabe, Toshiaki Iwamatsu, Shigeto Maegawa, Yuzuru Ohji

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A capacitorless twin-transistor random access memory (TTRAM) on SOI.

Fukashi Morishita, Hideyuki Noda, Takayuki Gyohten, Mako Okamoto, Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

1997

A 1-V 46-ns 16-Mb SOI-DRAM with body control technique.

Ken'ichi Shimomura, Hiroki Shimano, Narumi Sakashita, Fumihiro Okuda, Toshiyuki Oashi, Yasuo Yamaguchi, Takahisa Eimori, Masahide Inuishi, Kazutami Arimoto, Shigeto Maegawa, Yasuo Inoue, Shinji Komori, Kazuo Kyuma

IEEE J. Solid State Circuits, 1997