Shigeki Kohama

According to our database, Shigeki Kohama authored at least 3 papers between 1993 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2006

A Burst-Mode Bit-Synchronization IC With Large Tolerance for Pulse-Width Distortion for Gigabit Ethernet PON.

Hitoyuki Tagami, Seiji Kozaki, Kenichi Nakura, Shigeki Kohama, Masamichi Nogami, Kuniaki Motoshima

IEEE J. Solid State Circuits, 2006

1997

Scalable Shared-Buffering ATM Switch with a Versatile Searchable Queue.

Hideaki Yamanaka, Hirotaka Saito, Harofusa Kondoh, Yasuhito Sasaki, Hirotoshi Yamada, Munenori Tsuzuki, Satoshi Nishio, Hiromi Notani, Atsushi Iwabu, Masahiko Ishiwaki, Shigeki Kohama, Yoshio Matsuda, Kazuyoshi Oshima

IEEE J. Sel. Areas Commun., 1997

1993

A 622-Mb/s 8*8 ATM switch chip set with shared multibuffer architecture.

Harufusa Kondoh, Hiromi Notani, Hideaki Yamanaka, Keiichi Higashitani, Hirotaka Saito, Isamu Hayashi, Shigeki Kohama, Yoshio Matsuda, Kazuyoshi Oshima, Masao Nakaya

IEEE J. Solid State Circuits, July, 1993