Sherif M. Sharroush

According to our database, Sherif M. Sharroush authored at least 17 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Design of a 3-bit 2.2 ps step 357.5 ps range 0.247 μm2 0.85 μW 45 nm All-MOS delay element.

Sherif M. Sharroush, Yasser S. Abdalla

Integr., 2024

2023

Proposed time-mode wide fan-in NAND and NOR gates.

Sherif M. Sharroush, Emad Badry

Int. J. Circuit Theory Appl., July, 2023

2020

Inverter-based voltage-controlled and programmable comparators.

Sherif M. Sharroush

Int. J. Circuit Theory Appl., 2020

An MTCMOS Subthreshold-Leakage Reduction Algorithm.

Sherif M. Sharroush

Proceedings of the 2nd Novel Intelligent and Leading Emerging Sciences Conference, 2020

Optimum Sizing of the Sleep Transistor in MTCMOS Technology.

Sherif M. Sharroush

Proceedings of the 2nd Novel Intelligent and Leading Emerging Sciences Conference, 2020

2019

A predischarged bitline 1T-1C DRAM readout scheme.

Sherif M. Sharroush

Microelectron. J., 2019

Design of the CMOS inverter-based amplifier: A quantitative approach.

Sherif M. Sharroush

Int. J. Circuit Theory Appl., 2019

A Novel Current-Domain DRAM Readout Scheme.

Sherif M. Sharroush

Proceedings of the 31st International Conference on Microelectronics, 2019

2018

Time-Domain Readout of 1T-1C DRAM Cells.

Sherif M. Sharroush

J. Circuits Syst. Comput., 2018

2017

A voltage-controlled ring oscillator based on an FGMOS transistor.

Sherif M. Sharroush

Microelectron. J., 2017

2016

Performance optimization of 1T-1C DRAMs: A quantitative study.

Sherif M. Sharroush

Microelectron. J., 2016

2015

An alternative to CMOS stacks based on a floating-gate transistor.

Sherif M. Sharroush

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A novel self-referenced ferroelectric-memory readout scheme.

Sherif M. Sharroush

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2014

Reading DRAM cells using two properly designed cascaded inverters.

Sherif M. Sharroush

Elektrotech. Informationstechnik, 2014

2013

Low-power and high-speed DRAM readout scheme.

Sherif M. Sharroush

Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012

Dynamic random-access memories without sense amplifiers.

Sherif M. Sharroush, Yasser S. Abdalla, Ahmed A. Dessouki, El-Sayed A. El-Badawy

Elektrotech. Informationstechnik, 2012

2007

Increasing the Sense Margin of 1T-1C Ferroelectric Random-Access Memories.

Aly E. Salama, Sherif M. Sharroush, Mahmoud Y. Fekry

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007