Sherif Hammouda

Orcid: 0000-0003-4624-103X

According to our database1, Sherif Hammouda authored at least 10 papers between 2002 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Accuracy-Based Hybrid Parasitic Capacitance Extraction Using Rule-Based, Neural-Networks, and Field-Solver Methods.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

RC Parasitic-Aware Layout Analysis and Routing Optimization Methodology.
IEEE Access, 2022

Fast and Accurate Machine Learning Compact Models for Interconnect Parasitic Capacitances Considering Systematic Process Variations.
IEEE Access, 2022

A Fast and Accurate Middle End of Line Parasitic Capacitance Extraction for MOSFET and FinFET Technologies Using Machine Learning.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Connectivity-Based Machine Learning Compact Models for Interconnect Parasitic Capacitances.
Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021

2016
A simple model for on-chip microstrip transmission lines in millimeter wave circuits.
Proceedings of the 28th International Conference on Microelectronics, 2016

2006
Chameleon ART: a non-optimization based analog design migration framework.
Proceedings of the 43rd Design Automation Conference, 2006

2004
A Fully Automated Approach for Analog Circuit Reuse.
Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

Analog IP migration using design knowledge extraction.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2002
A 1.5 V opamp design with high gain wide bandwidth and its application in a high Q bandpass filter operating at 10.7 MHz.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002


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