Shengcheng Wang
Orcid: 0000-0001-6939-4552
According to our database1,
Shengcheng Wang
authored at least 14 papers
between 2014 and 2022.
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Bibliography
2022
COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
2018
Recovery-Aware Proactive TSV Repair for Electromigration Lifetime Enhancement in 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst., 2018
Multicast Testing of Interposer-Based 2.5D ICs: Test-Architecture Design and Test Scheduling.
ACM Trans. Design Autom. Electr. Syst., 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Leveraging recovery effect to reduce electromigration degradation in power/ground TSV.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 25th IEEE Asian Test Symposium, 2016
2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014