Sheng-Yu Fu
Orcid: 0000-0002-0893-2430
According to our database1,
Sheng-Yu Fu
authored at least 17 papers
between 2015 and 2019.
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Bibliography
2019
ACM Trans. Archit. Code Optim., 2019
ACM Trans. Archit. Code Optim., 2019
Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator.
J. Syst. Archit., 2019
Efficient Dynamic Device Placement for Deep Neural Network Training on Heterogeneous Systems.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
Proceedings of the 48th International Conference on Parallel Processing, 2019
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019
2018
ACM Trans. Embed. Comput. Syst., 2018
Softw. Pract. Exp., 2018
Proceedings of the 2018 Conference on Research in Adaptive and Convergent Systems, 2018
Automatically Migrating Sequential Applications to Heterogeneous System Architecture.
Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018
Proceedings of the International Conference on Compilers, 2018
2017
Adaptive runtime exploiting sparsity in tensor of deep learning neural network on heterogeneous systems.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Dynamic translation of structured Loads/Stores and register mapping for architectures with SIMD extensions.
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017
Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary Translation.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017
2016
Proceedings of the 22nd IEEE International Conference on Parallel and Distributed Systems, 2016
2015
Proceedings of the 21st IEEE International Conference on Parallel and Distributed Systems, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015