Shen-Li Chen

Orcid: 0000-0001-7860-3889

According to our database1, Shen-Li Chen authored at least 26 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
ESD-capability Study of High-voltage nLDMOSs with out the Drift Region DPW Effect.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

High-voltage nLDMOS Drain Side Schottky/SCR Modulations for Enhancement Reliability Capabilities.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

2022
An Investigation of ESD-Enhancement by the Drain-side Embedded SCR Area Modulation for HV pLDMOSs.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022

ESD Capability Analysis of High-voltage nLDMOSs by the Bulk Terminal Modulation.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022

2021
Improved UHV IGBT-Cell for ESD Protection with High Holding Voltage via a 0.5µm BCD Process.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

Holding-voltage Improvement of UHV Circular nLDMOS Transistors by the Drain-side SCR Engineering.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

ESD-Immunity Impact of HV pLDMOS with Drain-side Embedded Horizontal P-type Schottky Modulations.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

2020
ESD-capability Enhancement of Ultra-high Voltage nLDMOSs by the DPW Discrete Layer.
Proceedings of the 3rd IEEE International Conference on Knowledge Innovation and Invention, 2020

ESD-ability of Circular nLDMOS Transistors of UHV by Super-junction Length Modulation and Concentration Gradient.
Proceedings of the 3rd IEEE International Conference on Knowledge Innovation and Invention, 2020

Strengthened ESD Reliability of HV nLDMOSs with Embedded Horizontal Schottky Devices.
Proceedings of the 3rd IEEE International Conference on Knowledge Innovation and Invention, 2020

Improving the ESD Robustness of an Ultra-high Voltage nLDMOS Device with the Embedded Schottky Diode.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020

ESD-capability Influences of UHV Circular nLDMOS Transistors by the Drain-side Ladder-step STI.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020

A Novel SCR-based Schottky Diode and Lightly P-well Additions of HV 60V nLDMOS on ESD Capability.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020

2019
ESD-Reliability Investigation <sup>1</sup>of an UHV Elliptical LDMOS-SCR by the Drain-Side Junction Replacement.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019

Channel- & Drift Region's STI-Lengths Impacts of ESD Immunity in HV 60 V nLDMOS Devices.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019

Evaluating the Drift-Region Length Effect of nLDMOS on ESD Ability with a TLP Testing System.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

ESD Immunity Impacts of the Drain-Side Heterojunction Device Addition in HV 60 V n/pLDMOS Devices.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

2018
Sensing and Reliability Improvement of Electrostatic-Discharge Transient by Discrete Engineering for High-Voltage 60-V n-Channel Lateral-Diffused MOSFETs with Embedded Silicon-Controlled Rectifiers.
Sensors, 2018

Design and Impact on ESD/LU Immunities by Drain-Side Super-Junction Structures in Low-(High-)Voltage MOSFETs for the Power Applications.
IEICE Trans. Electron., 2018

2017
Design of High-ESD Reliability in HV Power pLDMOS Transistors by the Drain-Side Isolated SCRs.
IEICE Trans. Electron., 2017

2016
Design on ESD robustness of source-side discrete distribution in the 60-V high-voltage nLDMOS devices.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2016

ESD protection design for the 45-V pLDMOS-SCR (p-n-p-arranged) devices with source-discrete distributions.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

2015
The <i>I</i>-<i>V</i> Characteristic Prediction of BCD LV pMOSFET Devices Based on an ANFIS-Based Methodology.
Adv. Fuzzy Syst., 2015

ESD reliability building in 0.25 μm 60-V p-channel LDMOS DUTs with different embedded SCRs.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

Anti-ESD impacts on 60-V P-channel LDMOS devices as none-ODs zone inserting in the bulk region.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

By using grey system and Neural-Fuzzy Network methods to obtain the threshold voltage of submicron n-MOSFET DUTs.
Proceedings of the 12th International Conference on Fuzzy Systems and Knowledge Discovery, 2015


  Loading...