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Sheldon B. Akers Jr.

Affiliations:
  • General Electric Company, Syracuse, New York, USA


According to our database1, Sheldon B. Akers Jr. authored at least 23 papers between 1955 and 1990.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

1990
Why is less information from logic simulation more useful in fault simulation?
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
,
Sungju Park
,
Balakrishnan Krishnamurthy
,
Ashok Swaminathan
Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

1989
A Group-Theoretic Model for Symmetric Interconnection Networks.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
,
Balakrishnan Krishnamurthy
IEEE Trans. Computers, 1989

Test counting: a tool for VLSI testing.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
,
Balakrishnan Krishnamurthy
IEEE Des. Test, 1989

1987
On Group Graphs and Their Fault Tolerance.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
,
Balakrishnan Krishnamurthy
IEEE Trans. Computers, 1987

The Star Graph: An Attractive Alternative to the n-Cube.
[BibTeX]
Sheldon B. Akers Jr.
,
Balakrishnan Krishnamurthy
,
Dov Harel
Proceedings of the International Conference on Parallel Processing, 1987

1984
On the Complexity of Estimating the Size of a Test Set.
[BibTeX]
[DOI]
Balakrishnan Krishnamurthy
,
Sheldon B. Akers Jr.
IEEE Trans. Computers, 1984

1981
On the use of the linear assignment algorithm in module placement.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
Proceedings of the 18th Design Automation Conference, 1981

1980
Test Generation Techniques.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
Computer, 1980

1978
Binary Decision Diagrams.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Computers, 1978

1976
A Logic System for Fault Test Generation.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Computers, 1976

1974
Fault Diagnosis as a Graph Coloring Problem.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Computers, 1974

1973
Universal Test Sets for Logic Networks.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Computers, 1973

1972
A Rectangular Logic Array.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Computers, 1972

1970
R70-40 Module Clustering to Minimize Delay in Digital Networks.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Computers, 1970

IC mask layout with a single conductor layer.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
,
James M. Geyer
,
Donald L. Roberts
Proceedings of the 7th Design Automation Workshop, 1970

1968
On Maximum Inversion with Minimum Inverters.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Computers, 1968

1965
On the Construction of (d, k) Graphs.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Electron. Comput., 1965

A Diagrammatic Approach to Multilevel Logic Synthesis.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IEEE Trans. Electron. Comput., 1965

1964
A diagrammatic approach to multi-level logic synthesis
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
Proceedings of the 5th Annual Symposium on Switching Circuit Theory and Logical Design, 1964

1962
Synthesis of combinational logic using three-input majority gates
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
Proceedings of the 3rd Annual Symposium on Switching Circuit Theory and Logical Design, 1962

1961
A Truth Table Method for the Synthesis of Combinational Logic.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
IRE Trans. Electron. Comput., 1961

Threshold logic and two-person, zero-sum games
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
Proceedings of the 2nd Annual Symposium on Switching Circuit Theory and Logical Design, 1961

1955
A Non-Numerical Approach to Production Scheduling Problems.
[BibTeX]
[DOI]
Sheldon B. Akers Jr.
,
Joyce Friedman
Oper. Res., 1955


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