Shayan Zhang

According to our database, Shayan Zhang authored at least 4 papers between 1994 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

A 5GHz 7nm L1 cache memory compiler for high-speed computing and mobile applications.

Michael Clinton, Rajinder Singh, Marty Tsai, Shayan Zhang, Bryan Sheffield, Jonathan Chang

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

1994

A delay model and optimization method of a low-power BiCMOS logic circuit.

Shayan Zhang, T. S. Kalkur, Steven Lee, Lori Gatza

IEEE J. Solid State Circuits, October, 1994

Analysis of the switching speed of BiCMOS buffer under high current.

Shayan Zhang, T. S. Kalkur, Steven Lee, Dengyuan Chen

IEEE J. Solid State Circuits, July, 1994

Analysis of BiCMOS buffer for input voltages with finite rise time.

Shayan Zhang, T. S. Kalkur

IEEE J. Solid State Circuits, July, 1994