Shay Gueron
Orcid: 0000-0002-9145-7609
According to our database1,
Shay Gueron
authored at least 105 papers
between 1993 and 2023.
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Bibliography
2023
Proceedings of the Cyber Security, Cryptology, and Machine Learning, 2023
2022
Designing a Practical Code-Based Signature Scheme from Zero-Knowledge Proofs with Trusted Setup.
Cryptogr., 2022
Proceedings of the Cyber Security, Cryptology, and Machine Learning, 2022
2021
Int. J. Comput. Math. Comput. Syst. Theory, 2021
IACR Cryptol. ePrint Arch., 2021
2020
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
Discret. Math., 2020
Proceedings of the Code-Based Cryptography - 8th International Workshop, 2020
2019
J. Cryptogr. Eng., 2019
SimpleENC and SimpleENCsmall - an Authenticated Encryption Mode for the Lightweight Setting.
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
Proceedings of the Cyber Security Cryptography and Machine Learning, 2019
Proceedings of the 16th IEEE Annual Consumer Communications & Networking Conference, 2019
Using the New VPMADD Instructions for the New Post Quantum Key Encapsulation Mechanism SIKE.
Proceedings of the 26th IEEE Symposium on Computer Arithmetic, 2019
2018
IEEE Trans. Dependable Secur. Comput., 2018
Achieving trustworthy Homomorphic Encryption by combining it with a Trusted Execution Environment.
J. Wirel. Mob. Networks Ubiquitous Comput. Dependable Appl., 2018
How Many Queries are Needed to Distinguish a Truncated Random Permutation from a Random Function?
J. Cryptol., 2018
IACR Cryptol. ePrint Arch., 2018
Proceedings of the 15th IEEE Annual Consumer Communications & Networking Conference, 2018
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018
Fast multiplication of binary polynomials with the forthcoming vectorized VPCLMULQDQ instruction.
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
IACR Cryptol. ePrint Arch., 2017
IACR Cryptol. ePrint Arch., 2017
Proceedings of the Topics in Cryptology - CT-RSA 2017, 2017
Proceedings of the Seventh ACM Conference on Data and Application Security and Privacy, 2017
Combining Homomorphic Encryption with Trusted Execution Environment: A Demonstration with Paillier Encryption and SGX.
Proceedings of the 2017 International Workshop on Managing Insider Security Threats, Dallas, TX, USA, October 30, 2017
Proceedings of the 14th IEEE Annual Consumer Communications & Networking Conference, 2017
2016
IACR Cryptol. ePrint Arch., 2016
IACR Cryptol. ePrint Arch., 2016
Proceedings of the Hardware and Architectural Support for Security and Privacy 2016, 2016
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016
Proceedings of the 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2016
Hardware Implementation of AES Using Area-Optimal Polynomials for Composite-Field Representation GF(2^4)^2 of GF(2^8).
Proceedings of the 23nd IEEE Symposium on Computer Arithmetic, 2016
Proceedings of the 23nd IEEE Symposium on Computer Arithmetic, 2016
2015
J. Cryptogr. Eng., 2015
J. Cryptogr. Eng., 2015
GCM-SIV: Full Nonce Misuse-Resistant Authenticated Encryption at Under One Cycle per Byte.
IACR Cryptol. ePrint Arch., 2015
IACR Cryptol. ePrint Arch., 2015
Proceedings of the 12th International Conference on Information Technology, 2015
2014
Parallelized hashing via j-lanes and j-pointers tree modes, with applications to SHA-256.
IACR Cryptol. ePrint Arch., 2014
Proceedings of the 11th International Conference on Information Technology: New Generations, 2014
2013
Proceedings of the Tenth International Conference on Information Technology: New Generations, 2013
2012
J. Cryptogr. Eng., 2012
J. Cryptogr. Eng., 2012
Inf. Process. Lett., 2012
Software Implementation of Modular Exponentiation, Using Advanced Vector Instructions Architectures.
Proceedings of the Arithmetic of Finite Fields - 4th International Workshop, 2012
Proceedings of the Ninth International Conference on Information Technology: New Generations, 2012
Speeding Up SHA-1, SHA-256 and SHA-512 on the 2nd Generation Intel® Core™ Processors.
Proceedings of the Ninth International Conference on Information Technology: New Generations, 2012
2011
53 Gbps Native GF(2 <sup>4</sup>) <sup>2</sup> Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors.
IEEE J. Solid State Circuits, 2011
IACR Cryptol. ePrint Arch., 2011
Proceedings of the Eighth International Conference on Information Technology: New Generations, 2011
Software Optimizations for Cryptographic Primitives on General Purpose x86_64 Platforms.
Proceedings of the Progress in Cryptology - INDOCRYPT 2011, 2011
2010
Efficient implementation of the Galois Counter Mode using a carry-less multiplier and a fast reduction algorithm.
Inf. Process. Lett., 2010
Proceedings of the ACM SIGCOMM 2010 Conference on Applications, 2010
Mitigating collision and preimage attacks against the generalized MDC-2 mode of operation.
Proceedings of the 15th IEEE Symposium on Computers and Communications, 2010
2009
Proceedings of the Emerging Challenges for Security, 2009
Proceedings of the Fast Software Encryption, 16th International Workshop, 2009
Proceedings of the Advances in Cryptology, 2009
2008
Vortex: A New Family of One Way Hash Functions based on Rijndael Rounds and Carry-less Multiplication.
IACR Cryptol. ePrint Arch., 2008
A 2.1GHz 6.5mW 64-bit Unified PopCount/BitScan Datapath Unit for 65nm High-Performance Microprocessor Execution Cores.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
Proceedings of the Fifth International Conference on Information Technology: New Generations (ITNG 2008), 2008
Vortex: A New Family of One-Way Hash Functions Based on AES Rounds and Carry-Less Multiplication.
Proceedings of the Information Security, 11th International Conference, 2008
2007
IEEE Micro, 2007
New Branch Prediction Vulnerabilities in OpenSSL and Necessary Software Countermeasures.
IACR Cryptol. ePrint Arch., 2007
2006
Proceedings of the Fault Diagnosis and Tolerance in Cryptography, 2006
Data and Computational Fault Detection Mechanism for Devices That Perform Modular Exponentiation.
Proceedings of the Fault Diagnosis and Tolerance in Cryptography, 2006
2005
Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005
2002
Proceedings of the Cryptographic Hardware and Embedded Systems, 2002
2001
Monte Carlo Methods Appl., 2001
Future Gener. Comput. Syst., 2001
Future Gener. Comput. Syst., 2001
1999
SIAM J. Appl. Math., 1999
1993
Biol. Cybern., 1993