Shawn S. H. Hsu

Orcid: 0000-0002-0910-7096

According to our database¹, Shawn S. H. Hsu authored at least 19 papers between 2007 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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In proceedings

Article

PhD thesis

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On csauthors.net:

Bibliography

2024

A 0.01-to-2.6-GHz Two-Fold Current Reuse Dual Noise-Canceling LNA Achieving 6.8-K Noise Temperature for Quantum Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

2021

Transmission Lines-Based Impedance Matching Technique for Broadband Rectifier.

[BibT_eX]

[DOI]

Sumin D. Joseph

Yi Huang

Shawn S. H. Hsu

IEEE Access, 2021

F5: Enabling New System Architectures with 2.5D, 3D, and Chiplets.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Session 13 Overview: Cryo-CMOS for Quantum Computing Technology Directions Subcommittee.

[BibT_eX]

[DOI]

Denis Daly

Shawn S. H. Hsu

Edoardo Charbon

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020

High-Power Wire Bonded GaN Rectifier for Wireless Power Transmission.

[BibT_eX]

[DOI]

IEEE Access, 2020

2018

A Transformer-Based Current-Reuse QVCO With an FoM Up to -200.5 dBc/Hz.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017

A Sierpinski Space-Filling Clock Tree Using Multiply-by-3 Fractal-Coupled Ring Oscillators.

[BibT_eX]

[DOI]

Yi-Wei Lin

Shawn S. H. Hsu

IEEE J. Solid State Circuits, 2017

2015

A low phase-noise class-C VCO using novel 8-shaped transformer.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.

[BibT_eX]

[DOI]

Mau-Chung Frank Chang

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013

Low Propagation Delay Load-Balanced 4 × 4 Switch Fabric IC in 0.13-µm CMOS Technology.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2013

The direct RF power injection method up to 18 GHz for investigating IC's susceptibility.

[BibT_eX]

[DOI]

Proceedings of the 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits, 2013

2012

A Novel Low Gate-Count Pipeline Topology With Multiplexer-Flip-Flops for Serial Link.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A novel low gate-count serializer topology with Multiplexer-Flip-Flops.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Low-noise amplifiers with robust ESD protection for RF SOC.

[BibT_eX]

[DOI]

Shawn S. H. Hsu

Ming-Hsien Tsai

Proceedings of the International SoC Design Conference, 2011

2009

A 10-Gb/s CML I/O Circuit for Backplane Interconnection in 0.18-µm CMOS Technology.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2009

2008

A 40-Gb/s Transimpedance Amplifier in 0.18-µm CMOS Technology.

[BibT_eX]

[DOI]

Jun-De Jin

Shawn S. H. Hsu

IEEE J. Solid State Circuits, 2008

A 0.18-µm CMOS Balanced Amplifier for 24-GHz Applications.

[BibT_eX]

[DOI]

Jun-De Jin

Shawn S. H. Hsu

IEEE J. Solid State Circuits, 2008

2007

A Wide Locking-Range Frequency Divider for LMDS Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2007

Miniaturization of Magnetic Resonance Microsystem Components for 3D Cell Imaging.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Shawn S. H. Hsu

Timeline

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